Patents by Inventor Jipeng Li
Jipeng Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069027Abstract: A use of nitrogen-doped carbon fluorescent quantum dots in preparation of aerobic glycolysis detection products is provided. The carbon-nitrogen fluorescent quantum dots are selected from one or more of C3N4 quantum dots, C2N quantum dots, and C3N quantum dots. The aerobic glycolysis detection products are reagents, based on a final volume of the reagents, the reagents comprise the carbon-nitrogen fluorescent quantum dots with a final concentration of 1 ?g/mL-1 mg/mL. The present disclosure realizes fluorescent labeling of NAD+ in living cells using the carbon-nitrogen fluorescent quantum dots, thus achieving fluorescent labeling and imaging of cells having aerobic glycolysis, which has the advantages of low cost, high efficiency, rapidity, and high accuracy.Type: ApplicationFiled: December 28, 2021Publication date: February 29, 2024Applicants: SHANGHAI NINTH PEOPLE'S HOSPITAL, SHANGHAI JIAOTONG UNIVERSITY SCHOOL OF MEDICINE, SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCESInventors: JIPENG LI, SIWEI YANG, GUQIAO DING, HUIFANG ZHOU, XIANQUN FAN
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Patent number: 10434233Abstract: A blood pump control system includes a local processing terminal and a remote processing terminal. The local processing terminal is configured to transmit to the remote processing terminal, collected current state parameters of the blood pump and heart activity indexes, and to drive and control the blood pump according to blood pump adjusting parameters received from the remote processing terminal. The remote processing terminal is configured to obtain current blood pump adjusting parameters according to the current state parameters, and the heart activity indexes received from the local processing terminal, and set adjusting conditions; and to transmit the blood pump adjusting parameters back to the local processing terminal.Type: GrantFiled: November 27, 2013Date of Patent: October 8, 2019Assignees: Beijing Research Institute of Precise Mechatronics and Controls, RocketHeart Technology Co. LTDInventors: Jian Xu, Jipeng Li, Wei Wang, Jingjing Su, Xue Li, Lei Zhang
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Publication number: 20160263299Abstract: A blood pump control system includes a local processing terminal and a remote processing terminal. The local processing terminal is configured to transmit to the remote processing terminal, collected current state parameters of the blood pump and heart activity indexes, and to drive and control the blood pump according to blood pump adjusting parameters received from the remote processing terminal. The remote processing terminal is configured to obtain current blood pump adjusting parameters according to the current state parameters, and the heart activity indexes received from the local processing terminal, and set adjusting conditions; and to transmit the blood pump adjusting parameters back to the local processing terminal.Type: ApplicationFiled: November 27, 2013Publication date: September 15, 2016Inventors: JIAN XU, JIPENG LI, WEI WANG, JINGJING SU, XUE LI, LEI ZHANG, XIAOCHENG LIU, JIEMIN ZHANG
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Patent number: 9219410Abstract: A voltage generator may include a plurality of charge pumps, plural sets of delay pipelines and a phase controller. Given M delay pipelines having N stages each, there may be M*N charge pumps each having a triggering input coupled to a respective stage or a respective pipeline. The phase controller may include a plurality of phase control stages interconnecting among the delay pipelines to induce timing offsets among the outputs of the delay stage. In an alternate design, intermediate nodes among the pipeline's delay stages may be coupled to triggering inputs of a sub-set of the charge pumps. The phase controller may have a plurality of phase control stages coupled, respectively, between the intermediate nodes of the delay pipeline and intermediate nodes of the phase control stages may be coupled to triggering inputs of another sub-set of the charge pumps.Type: GrantFiled: September 14, 2012Date of Patent: December 22, 2015Assignee: ANALOG DEVICES, INC.Inventors: Jipeng Li, Richard E. Schreier
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Patent number: 9054731Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.Type: GrantFiled: November 6, 2013Date of Patent: June 9, 2015Assignee: ANALOG DEVICES GLOBALInventors: David Nelson Alldred, Jipeng Li, Richard E. Schreier, Hajime Shibata
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Publication number: 20150123828Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.Type: ApplicationFiled: November 6, 2013Publication date: May 7, 2015Applicant: ANALOG DEVICES TECHNOLOGYInventors: David Nelson Alldred, Jipeng Li, Richard E. Schreier, Hajime Shibata
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Patent number: 8860491Abstract: Embodiments of the present invention may include an apparatus and method to reduce an output swing in each stage of a multi-stage loop filter while also maintaining a desired signal transfer function for each respective stage. A given stage of the loop filter may include an integrator, a feedback path, a first cancellation path, and a second cancellation path. The first cancellation path may be coupled to the output of the integrator. The second cancellation path may be coupled to a feedback path provided about the input and output of the integrator. A first cancellation signal may be injected into the first cancellation path to reduce the output swing of the integrator. A second cancellation signal may be injected into the second cancellation path to minimize a change in the integrator's signal transfer function caused by the first cancellation signal.Type: GrantFiled: July 9, 2013Date of Patent: October 14, 2014Assignee: Analog Devices, Inc.Inventor: Jipeng Li
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Publication number: 20140078795Abstract: A voltage generator may include a plurality of charge pumps, plural sets of delay pipelines and a phase controller. Given M delay pipelines having N stages each, there may be M*N charge pumps each having a triggering input coupled to a respective stage or a respective pipeline. The phase controller may include a plurality of phase control stages interconnecting among the delay pipelines to induce timing offsets among the outputs of the delay stage. In an alternate design, intermediate nodes among the pipeline's delay stages may be coupled to triggering inputs of a sub-set of the charge pumps. The phase controller may have a plurality of phase control stages coupled, respectively, between the intermediate nodes of the delay pipeline and intermediate nodes of the phase control stages may be coupled to triggering inputs of another sub-set of the charge pumps.Type: ApplicationFiled: September 14, 2012Publication date: March 20, 2014Applicant: Analog Devices, Inc.Inventors: Jipeng Li, Richard E. Schreier
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Patent number: 8031098Abstract: In one embodiment, digital-to-analog converter (DAC) circuit includes dual DAC units employing pseudo-return-to-zero DAC operations to reduce inter-symbol interference. Moreover, each DAC unit is implemented using complementary MOS transistors to improve conversion performance. In another embodiment, a DAC calibration scheme performs background calibration of an array of DAC circuits in continuous time using a reference DAC circuit and a spare DAC circuit. Calibration (also referred to as “trimming”) of the DAC circuit using the calibration scheme of the present invention ensures that the DAC operates with high linearity over process variations. In one embodiment, the DAC circuit and the DAC calibration scheme are applied as the feedback DAC in a continuous-time sigma-delta (CT-??) analog-to-digital converter to realize high performance and high precision analog-to-digital conversions.Type: GrantFiled: January 19, 2010Date of Patent: October 4, 2011Assignee: National Semiconductor CorporationInventors: Christian Ebner, Jipeng Li, Bernd Schafferer
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Patent number: 7372391Abstract: A data conversion stage circuit (104) for an opamp-shared pipeline analog-to-digital converter (ADC) (100) includes an over-range detection and recovery circuit including first and second switches (S3, S4) connected between respective input terminals (136, 137) and output terminals (138, 139) of the opamp (128) and both controlled by a first control signal, and a logic circuit (150) coupled to receive the first residue value and compare the first residue value to a pair of high and low comparison voltage levels. The logic circuit asserts the first control signal during a first clock phase when the first residue value is either greater than the high comparison voltage level or less than the low comparison voltage level. The high and low comparison voltage levels define a voltage region outside of a reference voltage range of the data conversion stage circuit where the reference voltage range defines in-range voltage values for the data conversion stage circuit.Type: GrantFiled: February 21, 2007Date of Patent: May 13, 2008Assignee: National Semiconductor CorporationInventors: Matthew Courcy, Jipeng Li
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Patent number: 7345530Abstract: A switched-capacitor amplifier circuit including first and second pairs of sampling capacitors for sampling a pair of input signals includes a voltage regulator coupled to receive a first reference voltage and generate a first regulated output voltage related to the first reference voltage and independent of a first power supply voltage; a clock signal generator generating first and second clock signals referenced to the first power supply voltage and third and fourth clock signals referenced to the first regulated output voltage; and a first set of switches coupling the bottom plates of the sampling capacitors to the amplifier, the first set of switches being controlled by the third and fourth clock signals. The circuit may further include a second set of switches coupling the top plates of the sampling capacitors to the input signals, the second set of switches being controlled by the first and second clock signals.Type: GrantFiled: June 1, 2006Date of Patent: March 18, 2008Assignee: National Semiconductor CorporationInventors: Jipeng Li, Matthew Courcy, Gabriele Manganaro