Patents by Inventor Jiri BURYANEC

Jiri BURYANEC has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low drop-out voltage regulator
    Patent number: 9229464
    Abstract: The voltage regulator comprises a regulation loop (2), which comprises at least a pass transistor (18), a source transistor (28), a sensing transistor (22) and a retention transistor (24), and a stability compensation circuit (10), which comprises a first MOS resistor (12) and a second MOS resistor (14) coupled with the first MOS resistor (12). The gate of the second MOS resistor (14) is coupled to the gate of the pass transistor (18).
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: January 5, 2016
    Assignee: EM Microelectronic-Marin S.A.
    Inventors: Kevin Buescher, Jiri Buryanec
  • LOW DROP-OUT VOLTAGE REGULATOR
    Publication number: 20150035506
    Abstract: The voltage regulator comprises a regulation loop (2), which comprises at least a pass transistor (18), a source transistor (28), a sensing transistor (22) and a retention transistor (24), and a stability compensation circuit (10), which comprises a first MOS resistor (12) and a second MOS resistor (14) coupled with the first MOS resistor (12). The gate of the second MOS resistor (14) is coupled to the gate of the pass transistor (18).
    Type: Application
    Filed: July 31, 2013
    Publication date: February 5, 2015
    Applicant: EM Microelectronic-Marin S.A.
    Inventors: Kevin BUESCHER, Jiri BURYANEC