Patents by Inventor Jiri Nerad
Jiri Nerad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260180578Abstract: Circuits and methods for active power supply decoupling in synchronous digital systems. An active decoupling unit, incorporating switched capacitors, addresses voltage dips caused by simultaneous switching events. During peak demand, the unit quickly discharges capacitors to stabilize the supply voltage, while recharging occurs during low-demand intervals. This approach significantly reduces the required capacitor size and enhances charge delivery efficiency. Additionally, complementary clock signals can synchronize decoupling units, allowing partial or full compensation during both rising and falling edges of the clock. The invention provides enhanced area efficiency and reliability in synchronous digital logic environments.Type: ApplicationFiled: September 25, 2025Publication date: June 25, 2026Applicant: EM Microelectronic-Marin SAInventors: Jiri NERAD, Zdenek LUKES
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Patent number: 12597770Abstract: A voltage limiter for a signal receiver (1), the voltage limiter (20) including: an input (21) connectable to a signal source (10); an output (22) connectable to a detector (70) and connected to the input (21) via a signal conductor (30); a ground conductor (40) connectable to ground (5); a first branch (24) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a first diode element (52); a second branch (25) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a second diode element (53); and a resistor element (36, 54, 55) between the signal conductor (30) and the ground conductor (40).Type: GrantFiled: April 18, 2023Date of Patent: April 7, 2026Assignee: EM Microelectronic-Marin SAInventor: Jiri Nerad
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Publication number: 20260066848Abstract: An oscillator circuit for a signal transmitter, the oscillator circuit including: a resonant circuit (12) including a resonant inductor (LR) and a resonant capacitor (CR) parallel to the resonant inductor (LR); a driving branch (14) including a pump driver bank (38) connected to the resonant circuit (12); a feedback branch (15) connected to the resonant circuit (12), and an amplitude regulation loop (28) connected to the resonant circuit (12) via the feedback branch (15) and operable to control the pump driver bank (38). The amplitude regulation loop (28) includes: an envelope detector (30) connected to the resonant circuit (12) via the feedback branch (15), a differential amplifier (32) connected to the feedback branch (15) via the envelope detector (30), and an analog to digital converter (ADC) (34) connected to an output of the differential amplifier (32) and operable to control the pump driver bank (38).Type: ApplicationFiled: July 9, 2025Publication date: March 5, 2026Applicant: EM Microelectronic-Marin SAInventor: Jiri NERAD
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Publication number: 20250334991Abstract: In an electronic circuit for producing a reference current by using weak inversion in MOS transistors (7, 8) while using degeneration in a resistor (10) at a floating voltage along an electric path (4) linking two supply lines (1, 2), adjustment of the reference current is obtained by trimming the resistor. Parallel branches (13) in the electric path (4) can be selectively activated by a switch controller (17) for allowing the current flowing through them. A part of the switches (15) is connected to one of the supply lines at a supply voltage, which allows a precise adjustment.Type: ApplicationFiled: February 6, 2025Publication date: October 30, 2025Applicant: EM Microelectronic-Marin SAInventor: Jiri NERAD
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Publication number: 20250219628Abstract: An analog circuit (1) including: a signal input (VSIG) to provide an input signal via capacitive coupling, an edge detection stage (10) operable to detect rising and falling edges of the input signal provided at the signal input (VSIG), an amplifier stage with continuously variable gain and bandwidth (30) between the signal input (VSIG) and the edge detection stage (10) and operable to amplify the input signal provided by the signal input (VSIG).Type: ApplicationFiled: October 16, 2024Publication date: July 3, 2025Applicant: EM MICROLECTRONIC-MARIN S.A.Inventor: Jiri NERAD
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Patent number: 12101090Abstract: The disclosure concerns an oscillator circuit (10) for a signal transmitter, the oscillator circuit (10) comprising: a resonant circuit (12) comprising a resonant inductor (LR) and a resonant capacitor (CR) parallel to the resonant inductor (LR) or comprising a crystal device, a driving branch (14) comprising a pump capacitor (CP) connected to the resonant circuit (12), a feedback branch (20) connected to the resonant circuit (12), a phase shifting circuit (22) connected to the resonant circuit (12) via the feedback branch (20), a comparator circuit (24) connected to the feedback branch (20) via the phase shifting circuit (22) and a driver circuit (28) connected to an output of the comparator circuit (24) and operable to charge the pump capacitor (CP).Type: GrantFiled: May 3, 2023Date of Patent: September 24, 2024Assignee: EM Microelectronic-Marin SAInventor: Jiri Nerad
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Publication number: 20240014647Abstract: A voltage limiter for a signal receiver (1), the voltage limiter (20) including: an input (21) connectable to a signal source (10); an output (22) connectable to a detector (70) and connected to the input (21) via a signal conductor (30); a ground conductor (40) connectable to ground (5); a first branch (24) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a first diode element (52); a second branch (25) connected to the signal conductor (30), connected to the ground conductor (40) and comprising a second diode element (53); and a resistor element (36, 54, 55) between the signal conductor (30) and the ground conductor (40).Type: ApplicationFiled: April 18, 2023Publication date: January 11, 2024Applicant: EM Microelectronic-Marin SAInventor: Jiri NERAD
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Publication number: 20240007086Abstract: The disclosure concerns an oscillator circuit (10) for a signal transmitter, the oscillator circuit (10) comprising: a resonant circuit (12) comprising a resonant inductor (LR) and a resonant capacitor (CR) parallel to the resonant inductor (LR) or comprising a crystal device, a driving branch (14) comprising a pump capacitor (CP) connected to the resonant circuit (12), a feedback branch (20) connected to the resonant circuit (12), a phase shifting circuit (22) connected to the resonant circuit (12) via the feedback branch (20), a comparator circuit (24) connected to the feedback branch (20) via the phase shifting circuit (22) and a driver circuit (28) connected to an output of the comparator circuit (24) and operable to charge the pump capacitor (CP).Type: ApplicationFiled: May 3, 2023Publication date: January 4, 2024Applicant: EM Microelectronic-Marin SAInventor: Jiri NERAD
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Patent number: 10126770Abstract: A voltage regulator for driving a digital circuit includes an input terminal and an output terminal, a pass device and a first capacitor, and a boost circuit connected to the pass device or to the first capacitor and having a regulator boost input terminal connectable to the boost signal output terminal. The output terminal is connectable to a power terminal of a digital or switching circuit having at least a boost signal output terminal. The boost circuit includes a boost capacitor and a switching arrangement connected to the regulator boost input terminal and connected to the boost capacitor. The switching arrangement is controllable by a boost signal generated by the digital or switching circuit.Type: GrantFiled: January 25, 2018Date of Patent: November 13, 2018Assignee: EM Microelectronic-Marin SAInventor: Jiri Nerad
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Publication number: 20180259988Abstract: A voltage regulator for driving a digital circuit includes an input terminal and an output terminal, a pass device and a first capacitor, and a boost circuit connected to the pass device or to the first capacitor and having a regulator boost input terminal connectable to the boost signal output terminal. The output terminal is connectable to a power terminal of a digital or switching circuit having at least a boost signal output terminal. The boost circuit includes a boost capacitor and a switching arrangement connected to the regulator boost input terminal and connected to the boost capacitor. The switching arrangement is controllable by a boost signal generated by the digital or switching circuit.Type: ApplicationFiled: January 25, 2018Publication date: September 13, 2018Applicant: EM Microelectronic-Marin SAInventor: Jiri Nerad