Patents by Inventor Jiro Ishikawa

Jiro Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230088709
    Abstract: A semiconductor device includes a first regulator for generating a first power supply potential, a second regulator for generating a second power supply potential lower than the first power supply potential, and a static random access memory (SRAM) having a normal operation mode and a resume standby mode. The SRAM includes power supply switching circuits receiving a first power supply potential and a second power supply potential, and a memory array including a plurality of memory cells. When the SRAM is in the normal operation mode, the power switch circuit is controlled so that the first power supply potential is supplied from the power switch circuit to the memory array, and when SRAM is in the resume standby mode, the second power supply potential is supplied from the power switch circuit to the memory array.
    Type: Application
    Filed: August 2, 2022
    Publication date: March 23, 2023
    Inventors: Kouji SATOU, Shunya NAGATA, Jiro ISHIKAWA
  • Publication number: 20140184444
    Abstract: An antenna receives a radio wave transmitted from a GPS satellite. A wireless processing unit extracts positioning information from a signal of the radio wave received by the antenna. The positioning unit performs positioning on the basis of the positioning information extracted by the wireless processing unit. A transformer circuit includes a switching element and transforms supplied power to a predetermined voltage. A switching unit switches the transformer circuit to a stop state during an extraction period in which the positioning information is extracted by the wireless processing unit.
    Type: Application
    Filed: October 2, 2013
    Publication date: July 3, 2014
    Applicant: Fujitsu Mobile Communications Limited
    Inventor: Jiro ISHIKAWA
  • Publication number: 20090143039
    Abstract: An RSSI detecting unit measures a receiving power level of a signal receive from a base station, and notifies a mode change control unit of the measurement result. A Ec/Io detecting unit measures a Ec/Io level of the signal received from the base station, and notifies the mode change control unit of the measurement result. The mode change control unit discriminates the change of the operation mode in consideration of not only the receiving power level, but also the Ec/Io level, and does not change the Simultaneous-Mode from the Hybrid-Mode unless at least the Ec/Io level exceeds a threshold line.
    Type: Application
    Filed: March 18, 2008
    Publication date: June 4, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Jiro Ishikawa, Norio Abe
  • Patent number: 7110295
    Abstract: An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: September 19, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Ishikawa, Takashi Yamaki, Toshihiro Tanaka, Yukiko Umemoto, Akira Kato
  • Publication number: 20050128815
    Abstract: An erasing current is distributed to reduce a load of an internal power circuit and to decrease the number of drivers for erase. A semiconductor data processing device has: a memory array having nonvolatile memory cells arrayed in a matrix and divided into a plurality of erase blocks each instructed to be erased together; and a control circuit, wherein the control circuit controls both of two kinds of erasing voltages applied to the nonvolatile memory cell in the erase block instructed to be erased together to select an erase sector from the erase block for performing erase for each erase sector, thereby performing the erase for each erase sector in time division. Time division erase can distribute an erasing current. Two kinds of erasing voltages are used to select the erase sector. No specific drivers need be provided for each erase sector.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 16, 2005
    Inventors: Jiro Ishikawa, Takashi Yamaki, Toshihiro Tanaka, Yukiko Umemoto, Akira Kato
  • Publication number: 20010000504
    Abstract: A radio transmitter comprises a data burst randomizer for determining a transmission rate corresponding to a voice signal, an IF synthesizer for generating an IF signal for modulating the voice signal, a modulator for modulating the voice signal on the basis of the IF signal, a main synthesizer for generating an RF signal for frequency conversion, a frequency converter for subjecting the modulated signal to frequency conversion based on the RF signal, and amplifiers for amplifying and outputting the modulated signal. Power is supplied at least to the IF synthesizer, the modulator and the frequency converter at timings based on the determined transmission rate, and also based on periods required for settling the IF synthesizer and the main synthesizer. By virtue of this structure, more reliable reduction of current consumption can be achieved, while securing stable operations of the synthesizers.
    Type: Application
    Filed: December 5, 2000
    Publication date: April 26, 2001
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Jiro Ishikawa
  • Patent number: 4983757
    Abstract: Carboxylic acid esters and formamide are efficiently obtained for reacting carboxylic acid amides and formic acid esters, or carboxylic acid amides, alcohols and carbon monoxide in the presence of an alkaline earth metal oxide catalyst.
    Type: Grant
    Filed: March 28, 1990
    Date of Patent: January 8, 1991
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Jiro Ishikawa, Hirofumi Higuchi, Shuji Ebata, Koichi Kida
  • Patent number: 4776929
    Abstract: A process for production of high purity quarternary ammonium hydroxides, comprising electrolyzing quarternary ammonium hydrogencarbonates represented by the general formula: ##STR1## (wherein the symbols are as defined in the appended claims) in an electrolytic cell comprising an anode compartment and a cathode compartment defined by a cation exchange membrane. In accordance with this process, high purity quarternary ammonium hydroxides can be produced with high electrolytic efficiency and further without causing corrosion of equipment. Since the quarternary ammonium hydroxides produced by the present invention are of high purity, they can be effectively used as, for example, cleaners, etchants or developers for wafers in the production of IC and LSI in the field of electronics and semiconductors.
    Type: Grant
    Filed: November 12, 1987
    Date of Patent: October 11, 1988
    Assignee: Mitsubishi Gas Chemical Company, Inc.
    Inventors: Tetsuo Aoyama, Eiji Shima, Jiro Ishikawa, Naoto Sakurai
  • Patent number: 4505821
    Abstract: Waste liquors containing phenolics and formaldehyde can quickly and economically be treated by a microorganism of genus Trichosporon to prevent water pollution.
    Type: Grant
    Filed: May 21, 1984
    Date of Patent: March 19, 1985
    Assignee: Nagoya University
    Inventors: Yasuyuki Kaneko, Masao Ito, Yukio Ogura, Jiro Ishikawa