Abstract: A spindle control system for a numerical control apparatus (CNC). A servo control circuit (10) includes a microprocessor (11), a memory (12), and two counters (13, 15) for counting pulses from encoders, and is connected to a CNC bus (1). A power amplifier (21) is able to receive a command from the servo control circuit (10) and control the rotation of a spindle motor, and a separate encoder (25) is able to feed pulses back to the counter (13) for contour control, and is coupled to a spindle. The counter (13) of the servo control circuit (10) is used to detect the rotational position of the spindle motor (22), whereas the other counter (15) counts the feedback pulses for thread cutting or the like. Therefore, the servo control circuit (10) can control both the position and rotation of the spindle motor (22).

Abstract: A method is provided of allocating board slot numbers in a control system composed of a plurality of boards which are subject to a variation in number and type. Slot numbers (12), in a maximum system (10) are determined to prepare software, and module identification numbers (13-18) of the boards at respective slots in a particular system (20) are read out. The read-out modules are converted to slot numbers (22) in the maximum system (10). Software in the maximum system can thus be executed without alteration.

Abstract: An interrupt control method is provided for a multiprocessor system in which a plurality of processors (21, 31, 41) and an interface circuit (10) for causing interrupts are connected to a bus. According to the method, a particular address space (Addr1, Addr2, Addr3) is used as an interrupt address, and a mask bit corresponding to the address space is selected in each processor. The mask bit is stored in a register (24, 34, 44) in the processor. A bus cycle generator circuit in the interface circuit (10) is allowed to occupy the bus in response to an interrupt signal, and a bit indicative of a cause of an interrupt and corresponding to the address space is written into an address bus. The processor (21, 31, 41) recognizes an interrupt from the address bus bit corresponding to the address space (Addr1, Addr2, Addr3) and the mask bit stored in the register (24, 34, 44).

Abstract: A synchronous motor control system for preventing a torque efficiency reduction on high-speed rotation and acceleration to produce a torque efficiently at all times. The synchronous motor control system detects when inverter drive signals for controlling currents supplied to the synchronous motor exceed a physical saturable quantity of an inverter, and corrects current waveforms applied to the synchronous motor to make sure that they are sine waves at all times.