Abstract: Disclosed is a method for manufacturing a semiconductor device, which provides an isolation region in which a dense silicon oxide film is formed in a trench that requires high aspect ratio. The method includes forming an isolation trench using, as an etching mask, a nitride mask film formed on a substrate, forming a liner nitride film in the isolation trench, depositing a flowable silazane compound by a CVD method such that the height of the flowable silazane compound is higher than the upper surface of the nitride mask film from the upper portion of the trench, performing heat treatment under an oxidizing atmosphere to convert the flowable silazane compound film into a silicon oxide film and simultaneously densifying therefore, and planarizing the silicon oxide film to the height of the upper surface of the nitride mask film.

Abstract: A method of forming a semiconductor device includes the following processes. A dummy insulating film is formed over a semiconductor substrate by using a source material that is free of carbon as an essential component. A hole that penetrates the dummy insulating film is formed. A conductive film is formed, which covers at least a side wall of the hole of the dummy insulating film. The dummy insulating film is removed to expose an outer surface of the conductive film.

Abstract: Disclosed is a method for manufacturing a semiconductor device, which provides an isolation region in which a dense silicon oxide film is formed in a trench that requires high aspect ratio. The method includes forming an isolation trench using, as an etching mask, a nitride mask film formed on a substrate, forming a liner nitride film in the isolation trench, depositing a flowable silazane compound by a CVD method such that the height of the flowable silazane compound is higher than the upper surface of the nitride mask film from the upper portion of the trench, performing heat treatment under an oxidizing atmosphere to convert the flowable silazane compound film into a silicon oxide film and simultaneously densifying therefor, and planarizing the silicon oxide film to the height of the upper surface of the nitride mask film.

Abstract: A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A first spin-on-dielectric layer is formed over a semiconductor substrate. An abnormal oxidation of the first spin-on-dielectric layer is carried out. A surface of the first spin-on-dielectric layer is removed. A second spin-on-dielectric layer is formed over the first spin-on-dielectric layer. A non-abnormal oxidation of the first and second spin-on-dielectric layers is carried out to modify the second spin-on-dielectric layer without modifying the first spin-on-dielectric layer.

Abstract: Such a method is disclosed that includes forming a liner film to cover a surface of the substrate including a trench, washing a surface of the liner film with water, removing remaining water after the washing, applying a polysilazane solution to fill the trench by spin coating after the removing, and reforming the polysilazane solution into a silicon oxide film by annealing.

Abstract: A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A first spin-on-dielectric layer is formed over a semiconductor substrate. An abnormal oxidation of the first spin-on-dielectric layer is carried out. A surface of the first spin-on-dielectric layer is removed. A second spin-on-dielectric layer is formed over the first spin-on-dielectric layer. A non-abnormal oxidation of the first and second spin-on-dielectric layers is carried out to modify the second spin-on-dielectric layer without modifying the first spin-on-dielectric layer.

Abstract: In an LNB 10, a power supply circuit 12 has pre-regulators PRa and PRb provided one for each of power supply paths respectively from ports 13a and 13b, a bypass portion BP that, when the potential difference between the output terminals of the pre-regulators PRa and PRb is greater than a predetermined threshold value, short-circuits together those output terminals, and main regulators REG1 and REG2 provided in the stage following the bypass portion BP to generate, from the output voltages Va? and Vb? of the pre-regulators PRa and PRb, drive voltages VA and VB for the internal circuits A and B. With this circuit configuration, simple though it is, even if there are instantaneous variations in the voltages fed from a plurality of receivers connected, no variations appear in the currents respectively extracted therefrom.

Abstract: This semiconductor device includes: a first cylinder interlayer insulating film; a second cylinder interlayer insulating film; a cylinder hole including a first cylinder hole and a second cylinder hole communicating with the first cylinder hole; and a capacitor including a lower electrode and an upper electrode. The first cylinder interlayer insulating film has an etching rate for etchant, which is two to six times as high as an etching rate for the second cylinder interlayer insulating film, a hole diameter of the first cylinder hole is larger than that of the second cylinder hole, and the hole diameter of the second cylinder hole near an interface between the first cylinder interlayer insulating film and the second cylinder interlayer insulating film increases as the second cylinder hole approaches the interface.

Abstract: A process for manufacturing a semiconductor device includes the steps of: forming a gate oxide film and a gate electrode on a substrate; forming a SiCN protection film on the gate electrode; depositing an interlayer dielectric film for covering the SiCN protection film; etching the dielectric film in a self-alignment with the SiCN protection film to form a contact hole; and forming a contact plug connected to the surface of the substrate in the contact hole.

Abstract: A polarized wave separator includes a tubular waveguide, and a partition extending in the waveguide along the longitudinal direction thereof. The end of the partition facing the longitudinal direction is a step-graded end taking a stepped configuration when viewed from the side. A dielectric portion is disposed so as to cover at least the portion of the step-graded end when viewed in the longitudinal direction.

Abstract: A high-frequency circuit comprises a substrate having an electronic component on an obverse side thereof, a first ground pattern formed on almost an entire reverse side of the substrate, a microstrip line formed on the obverse side of the substrate, and a bias line connected to the electronic component on the obverse side of the substrate and formed continuously on the obverse side and the reverse side of the substrate so as to cross the microstrip line on the reverse side of the substrate in plan view so as to supply a bias voltage to the electronic component, wherein the first ground pattern is formed so as to circumvent the bias line formed on the reverse side of the substrate, a portion of the first ground pattern that circumvents the bias line on the reverse side of the substrate is continuously formed on the obverse side of the substrate as a second ground pattern so as to divide the microstrip line in two parts, and a chip jumper is arranged to bridge the two divided parts of the microstrip line over t

Abstract: In an LNB 10, a power supply circuit 12 has pre-regulators PRa and PRb provided one for each of power supply paths respectively from ports 13a and 13b, a bypass portion BP that, when the potential difference between the output terminals of the pre-regulators PRa and PRb is greater than a predetermined threshold value, short-circuits together those output terminals, and main regulators REG1 and REG2 provided in the stage following the bypass portion BP to generate, from the output voltages Va? and Vb? of the pre-regulators PRa and PRb, drive voltages VA and VB for the internal circuits A and B. With this circuit configuration, simple though it is, even if there are instantaneous variations in the voltages fed from a plurality of receivers connected, no variations appear in the currents respectively extracted therefrom.

Abstract: A polarized wave separator includes a tubular waveguide, and a partition extending in the waveguide along the longitudinal direction thereof. The end of the partition facing the longitudinal direction is a step-graded end taking a stepped configuration when viewed from the side. A dielectric portion is disposed so as to cover at least the portion of the step-graded end when viewed in the longitudinal direction.

Abstract: A high-frequency circuit comprises a substrate having an electronic component on an obverse side thereof, a first ground pattern formed on almost an entire reverse side of the substrate, a microstrip line formed on the obverse side of the substrate, and a bias line connected to the electronic component on the obverse side of the substrate and formed continuously on the obverse side and the reverse side of the substrate so as to cross the microstrip line on the reverse side of the substrate in plan view so as to supply a bias voltage to the electronic component, wherein the first ground pattern is formed so as to circumvent the bias line formed on the reverse side of the substrate, a portion of the first ground pattern that circumvents the bias line on the reverse side of the substrate is continuously formed on the obverse side of the substrate as a second ground pattern so as to divide the microstrip line in two parts, and a chip jumper is arranged to bridge the two divided parts of the microstrip line over t