Abstract: A liquid crystal panel includes a pixel electrode, a common electrode, a plurality of data lines, a plurality of pixel selection lines, and a pixel switching unit. A driving device includes a data line driving unit, a pixel selection line driving unit, a voltage generation unit for generating various voltages used for the data line driving unit, the pixel selection line driving unit, and the common electrode, and a control unit. The control unit has an input discrimination unit for discriminating between an input state where a video signal is inputted and a non-input state where the video signal is not inputted, and a regulation unit for regulating a potential difference between the pixel electrode and the common electrode to zero with respect to the plurality of pixels in the non-input state.

Abstract: A data converter divides input data into first subframe data and latter subframe data, and the latter subframe data is given to a data serial-parallel converter and serial-parallel converted. The first subframe data is given to a line memory group, and given to an overdrive operation circuit after a given delay. The latter subframe data converted into parallel data is given to a line memory group, and given to a data parallel-serial converter after a given delay, where it is parallel-serial converted, and then it becomes output data after the first subframe data outputted from the overdrive operation circuit.

Abstract: A data converter divides input data into first subframe data and latter subframe data, and the latter subframe data is given to a data serial-parallel converter and serial-parallel converted. The first subframe data is given to a line memory group, and given to an overdrive operation circuit after a given delay. The latter subframe data converted into parallel data is given to a line memory group, and given to a data parallel-serial converter after a given delay, where it is parallel-serial converted, and then it becomes output data after the first subframe data outputted from the overdrive operation circuit.

Abstract: A noise elimination circuit that eliminates a noise of a display control signal of a matrix display device, includes a rising edge detection circuit unit that detects a rising edge of a signal for eliminating a noise, a counter that performs a count operation during a predefined period of time, an initialization circuit unit that generates an initialization signal of the counter, a count enable circuit unit that generates a count allowance signal of the counter, and an initial state detection circuit unit that detects whether or not the counter is in an initial state. The counter starts the count operation from an initial value in response to a rising edge detection by the rising edge detection circuit unit. The counter is initialized again after the count operation during the predefined period of time is completed. An initial state detection signal by the initial state detection circuit unit becomes a signal from which a noise is eliminated.

Abstract: In forward scanning, a timing control unit outputs the display data in the same sequence as the input display data. In backward scanning, on the other hand, the timing control unit inverts the output sequence of the display data for one line (for one horizontal cycle). Upon input of a scan direction control signal indicating backward scanning, the timing control unit executes sequence change processing by using line memory. The display data in which the sequence of the pixel data is reversed is outputted together with the control signals. It is able to select whether to output data in an inverted sequence or in a normal sequence according to the scan direction control signal.

Abstract: An image display apparatus includes a timing controller to generate a control signal according to image data, a driver IC to take in image data according to the control signal and to supply the image data to source lines, and a display panel to perform screen-displaying according to the image data supplied to the source lines. Plural input ports of the driver IC, from which the image data are inputted, are arranged asymmetrically with respect to an input port for the control signal. The timing controller includes plural data output ports to output image data to the driver IC, an arrangement information storing unit to store arrangement information defining normal and reverse orders of arrangement of the image data, and an output port switching unit to determine an order of arrangement of the image data according to the arrangement information and to supply the image data.

Abstract: A liquid crystal display device according to the present invention includes a data storage circuit that stores frame data of the previous image of a liquid crystal panel, and an overdrive calculation circuit that compares the frame data stored in the data storage circuit and input data of the next image to be displayed on the liquid crystal panel and performs overdrive output to the liquid crystal panel. The overdrive output is performed over a plurality of frame periods.

Abstract: A noise elimination circuit that eliminates a noise of a display control signal of a matrix display device, includes a rising edge detection circuit unit that detects a rising edge of a signal for eliminating a noise, a counter that performs a count operation during a predefined period of time, an initialization circuit unit that generates an initialization signal of the counter, a count enable circuit unit that generates a count allowance signal of the counter, and an initial state detection circuit unit that detects whether or not the counter is in an initial state. The counter starts the count operation from an initial value in response to a rising edge detection by the rising edge detection circuit unit. The counter is initialized again after the count operation during the predefined period of time is completed. An initial state detection signal by the initial state detection circuit unit becomes a signal from which a noise is eliminated.

Abstract: An image display apparatus includes a timing controller to generate a control signal according to image data, a driver IC to take in image data according to the control signal and to supply the image data to source lines, and a display panel to perform screen-displaying according to the image data supplied to the source lines. Plural input ports of the driver IC, from which the image data are inputted, are arranged asymmetrically with respect to an input port for the control signal. The timing controller includes plural data output ports to output image data to the driver IC, an arrangement information storing unit to store arrangement information defining normal and reverse orders of arrangement of the image data, and an output port switching unit to determine an order of arrangement of the image data according to the arrangement information and to supply the image data.

Abstract: In forward scanning, a timing control unit outputs the display data in the same sequence as the input display data. In backward scanning, on the other hand, the timing control unit inverts the output sequence of the display data for one line (for one horizontal cycle). Upon input of a scan direction control signal indicating backward scanning, the timing control unit executes sequence change processing by using line memory. The display data in which the sequence of the pixel data is reversed is outputted together with the control signals. It is able to select whether to output data in an inverted sequence or in a normal sequence according to the scan direction control signal.