Patents by Inventor JISOO CHUNG

JISOO CHUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Three-dimensional semiconductor memory device
    Patent number: 11456254
    Abstract: A three-dimensional semiconductor memory device includes; a first block and a second block arranged on a first substrate in a first direction, wherein each of the first block and the second block includes electrode layers stacked on the first substrate, a source layer interposed between the first block and the first substrate, and between the second block and the first substrate, a first insulating separation pattern interposed between the first block and the second block and extending in the first direction, wherein the first insulating separation pattern includes a line portion and a protruding portion, the line portion extending in a second direction crossing the first direction, and the protruding portion having a width greater than a width of the line portion, a first source contact plug penetrating the protruding portion of the first insulating separation pattern to electrically connect the source layer, and at least one through via penetrating the source layer and at least one of the first block and th
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: September 27, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jisoo Chung, Kang-Won Lee, Sung-Min Hwang
  • THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20210265271
    Abstract: A three-dimensional semiconductor memory device includes; a first block and a second block arranged on a first substrate in a first direction, wherein each of the first block and the second block includes electrode layers stacked on the first substrate, a source layer interposed between the first block and the first substrate, and between the second block and the first substrate, a first insulating separation pattern interposed between the first block and the second block and extending in the first direction, wherein the first insulating separation pattern includes a line portion and a protruding portion, the line portion extending in a second direction crossing the first direction, and the protruding portion having a width greater than a width of the line portion, a first source contact plug penetrating the protruding portion of the first insulating separation pattern to electrically connect the source layer, and at least one through via penetrating the source layer and at least one of the first block and th
    Type: Application
    Filed: September 22, 2020
    Publication date: August 26, 2021
    Inventors: JISOO CHUNG, KANG-WON LEE, SUNG-MIN HWANG