Abstract: An apparatus for implementing VCAT in both SDH and PDH signals includes an SDH VCAT mapper coupled to a first telecom bus and a plurality of PDH units coupled to the first telecom bus and a second telecom bus. The PDH units read SDH VCAT bytes from the first telecom bus and write PDH VCAT bytes to the second telecom bus according to a gapped clock. At the data sink RS-Ack is determined before deskewing and is latched to be reported after deskewing. During deskewing, less than the maximum delay between members is tracked, thereby using less storage. Addressing of the deskewing storage is computed using a remainder algorithm.

Abstract: An apparatus for implementing VCAT in both SDH and PDH signals includes an SDH VCAT mapper coupled to a first telecom bus and a plurality of PDH units coupled to the first telecom bus and a second telecom bus. The PDH units read SDH VCAT bytes from the first telecom bus and write PDH VCAT bytes to the second telecom bus according to a gapped clock. At the data sink RS-Ack is determined before deskewing and is latched to be reported after deskewing. During deskewing, less than the maximum delay between members is tracked, thereby using less storage. Addressing of the deskewing storage is computed using a remainder algorithm.