Patents by Inventor Jitendra Goel

Jitendra Goel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11914585
    Abstract: Disclosed are systems and methods of querying a hybrid event index of a user. The systems and methods can include receiving a search request pertaining to at least a first namespace of a plurality of namespaces and determining a first index server storing a first portion of the hybrid event index associated with the first namespace. The systems and methods can further include searching, the first portion of the hybrid event index stored at the first index server, determining one or more attributes from the search request, and determining a payload based on the search results of the first portion of the hybrid event index. Finally, the systems and methods can include applying one or more attributes to the payload and sending the filtered payload.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 27, 2024
    Assignee: Dropbox, Inc.
    Inventors: Abhishek Agrawal, Samir Goel, Franck Chastagnol, Adam Faulkner, Jitendra Vaidya
  • Patent number: 4243951
    Abstract: An injection laser modulator comprises a self-biased field-effect transistor (FET) and an injection laser to provide a quiescent state during which lasing of the injection laser occurs in response to a high repetition rate signal of pulse coded modulation (PCM). The modulator is d.c. coupled to an input pulse source of PCM rendering it compatible with an input pulse referenced to ground and not being subject to voltage level shifting of the input pulse.The modulator circuit in its preferred and alternate embodiments provides various arrangements for high impedance input and low impedance output matching. In addition, means are provided for adjusting the bias of the FET as well as the bias of the injection laser.
    Type: Grant
    Filed: June 12, 1978
    Date of Patent: January 6, 1981
    Assignee: RCA Corporation
    Inventors: Herbert J. Wolkstein, Brian R. Dornan, Jitendra Goel
  • Patent number: 4207538
    Abstract: A positive temperature coefficient resistance element such as a sensistor and a negative coefficient resistance element such as a thermistor are arranged in a potential divider network, the output terminal of which produces a potential which is a function of temperature. The potential is applied as a bias potential to the control electrode of an amplifier circuit subject to variations in gain as a function of both control electrode voltage and temperature to reduce the gain, as a function of temperature, of the amplifier.
    Type: Grant
    Filed: August 29, 1978
    Date of Patent: June 10, 1980
    Assignee: RCA Corporation
    Inventor: Jitendra Goel
  • Patent number: 4194285
    Abstract: A field effect transistor having a gate on the bottom of a groove in a body of semiconductor material with the source and drain being on a surface at opposite sides of the groove is made by first forming a recess in the surface of the semiconductor body. A metal layer is then coated on the surface of the semiconductor body and on the surfaces of the recess. A layer of a photoresist is then coated over the metal layer. The photoresist is then exposed to a beam of light whose rays extend along a path which is at a very small angle with respect to the surface of the semiconductor body to fully expose a narrow portion of the photoresist layer at one edge of the recess. The fully exposed portion of the photoresist layer is removed to expose a narrow area of the metal layer along the edge of the recess. The exposed portion of the metal layer is then removed and a groove is formed in the portion of the surface of the semiconductor material exposed by removing a portion of the material layer.
    Type: Grant
    Filed: June 15, 1978
    Date of Patent: March 25, 1980
    Assignee: RCA Corporation
    Inventor: Jitendra Goel
  • Patent number: 4183041
    Abstract: A field effect transistor is mounted in a flip-chip carrier which is in contact with one surface of a metal plate, the other surface of the plate being in contact with one surface of a block of beryllium oxide. A metal sheet, connected to a ground plane, is in contact with the one surface of the block and the surface of the block opposed therefrom. The plate and the sheet have a space therebetween. A film resistor is disposed upon the block in the space.
    Type: Grant
    Filed: June 26, 1978
    Date of Patent: January 8, 1980
    Assignee: RCA Corporation
    Inventor: Jitendra Goel
  • Patent number: 4167681
    Abstract: A microwave power limiter for generating an output RF signal of substantially constant power level in response to an input RF signal of varying power level comprises a dual gate field effect transistor (FET). The FET is biased such that the RF power output variation is small compared to the input power variation in the saturation region. A number of FET cascaded stages may be utilized to reduce this power output variation. A small signal amplifier including a number of FET cascaded stages may be employed in the limiter to increase the power level to that gain or drive level compatible with the saturated FET stages.
    Type: Grant
    Filed: October 3, 1977
    Date of Patent: September 11, 1979
    Assignee: RCA Corporation
    Inventors: Herbert J. Wolkstein, Arye Rosen, Jitendra Goel
  • Patent number: 4145459
    Abstract: A short gate field effect transistor having a gate on the bottom of a recess in a body of semiconductor material with the source and drain being on the surface of the semiconductor body at opposite sides of the recess is made by providing a metal film on the surface of the semiconductor body with the metal film having an opening therein. A recess is formed in the portion of the semiconductor body in the opening in the metal film. While protecting the bottom portion of the recess, metal films are plated up on each side of the recess until the spacing between the metal films across the recess is equal to the desired length of the gate. The gate is then deposited on the bottom of the recess using the plated metal films as a mask to control the length of the gate.
    Type: Grant
    Filed: February 2, 1978
    Date of Patent: March 20, 1979
    Assignee: RCA Corporation
    Inventor: Jitendra Goel
  • Patent number: 4117301
    Abstract: A mask for manufacturing microcircuits is comprised of a substratum and a layer of matter, such as, for example gold, adjacent the substratum. An aperture is located in the layer of matter. The aperture in the layer of matter exhibits a cross-section resembling an inverted isosceles trapezoid. The method for manufacture of the mask comprises the steps of appositioning a patterned layer of photoresist to a layer of gold which is adjacent the substratum. The structure comprising the photoresist, the gold layer and the substratum is exposed to a beam of ions having a preselected kinetic energy such that the ions remove gold exposed by apertures in the photoresist layer. The kinetic energy of the ions is selected such that an aperture is eroded in the layer of gold, the aperture exhibiting an inverted isosceles trapezoidal cross-section.
    Type: Grant
    Filed: August 8, 1977
    Date of Patent: September 26, 1978
    Assignee: RCA Corporation
    Inventors: Jitendra Goel, Subrahmanyam Yegna Narayan, Ira Drukier