Patents by Inventor Jitsuho Hirota

Jitsuho Hirota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6768062
    Abstract: A connection method and a connection structure, using solder bumps, for component-side pad electrodes and substrate-side pad electrodes, and inspecting methods for the connection state thereof which are adaptable to high density mounting, and which allow the miniaturization of the product formed by mounting a surface-mount component onto a substrate. Substrate-side pad electrodes are arranged inside a component-corresponding region A; the length of the substrate-side pad electrodes is set to be larger than that of the corresponding component-side pad electrode; an IC chip (surface-mount component) is placed on the substrate so that each of the solder bumps is opposed to a predetermined substrate-side pad electrode; and the solder bumps are melted by heating, thereby connecting each of the component-side pad electrodes and one of the substrate-side pad electrodes through the solder.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: July 27, 2004
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Ryoichi Morimoto, Jitsuho Hirota, Tatsuya Funaki
  • Patent number: 6598779
    Abstract: An electronic component mounting method by which a surface-mount component and an IC can be efficiently and reliably mounted on a single substrate is provided. A high-temperature solder paste (4) is supplied to electrodes (2) for receiving surface-mount components (40), and the surface-mount components (40) are provisionally fixed on the electrodes (2) with the high-temperature solder paste (4). In addition, flux (5) is applied to an electrode (1) for receiving an IC (30a) that is provided with eutectic solder bumps (31) or on the eutectic solder bumps (31), and the IC (30a) is provisionally fixed on the electrode (1) with the flux (5). Then, a wiring substrate (10) is heated to a high temperature at which both the high-temperature solder and the eutectic solder melt, so that the surface-mount components (40) and the IC (30a) are reflow-soldered.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: July 29, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Ryoichi Morimoto, Jitsuho Hirota
  • Publication number: 20020104877
    Abstract: An electronic component mounting method by which a surface-mount component and an IC can be efficiently and reliably mounted on a single substrate is provided. A high-temperature solder paste (4) is supplied to electrodes (2) for receiving surface-mount components (40), and the surface-mount components (40) are provisionally fixed on the electrodes (2) with the high-temperature solder paste (4). In addition, flux (5) is applied to an electrode (1) for receiving an IC (30a) that is provided with eutectic solder bumps (31) or on the eutectic solder bumps (31), and the IC (30a) is provisionally fixed on the electrode (1) with the flux (5). Then, a wiring substrate (10) is heated to a high temperature at which both the high-temperature solder and the eutectic solder melt, so that the surface-mount components (40) and the IC (30a) are reflow-soldered.
    Type: Application
    Filed: January 14, 2002
    Publication date: August 8, 2002
    Inventors: Ryoichi Morimoto, Jitsuho Hirota
  • Publication number: 20020043396
    Abstract: A connection method and a connection structure, using solder bumps, for component-side pad electrodes and substrate-side pad electrodes, and inspecting methods for the connection state thereof which are adaptable to high density mounting, and which allow the miniaturization of the product formed by mounting a surface-mount component onto a substrate. Substrate-side pad electrodes are arranged inside a component-corresponding region A; the length of the substrate-side pad electrodes is set to be larger than that of the corresponding component-side pad electrode; an IC chip (surface-mount component) is placed on the substrate so that each of the solder bumps is opposed to a predetermined substrate-side pad electrode; and the solder bumps are melted by heating, thereby connecting each of the component-side pad electrodes and one of the substrate-side pad electrodes through the solder.
    Type: Application
    Filed: October 11, 2001
    Publication date: April 18, 2002
    Inventors: Ryoichi Morimoto, Jitsuho Hirota, Tatsuya Funaki
  • Patent number: 5950908
    Abstract: A method of depositing solder paste includes the steps of: superimposing a masking member having a plurality of through-holes and a supporting member on each other so that the supporting member covers the plurality of through-holes; filling cavity portions formed by the plurality of through-holes and the supporting member with solder paste; disposing an LSI chip and the masking member so that electrodes and the cavity portions are superimposed on each other respectively; and heating the solder paste so as to make the solder paste deposit on the electrodes.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: September 14, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Junji Fujino, Jitsuho Hirota, Goro Izuta, Akira Adachi
  • Patent number: 5302550
    Abstract: A method for ball-bonding thin film structures. The bonding characteristics of a thin-film electrode structure are measured, before the actual bonding step, by pressing a ball (of a material similar to that of the bonding wire) against an electrode by a bonding capillary, and then measuring the resultant indentation of the electrode. The depth of this test indentation of the electrode has a good correlation with the bondability.
    Type: Grant
    Filed: April 13, 1988
    Date of Patent: April 12, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Jitsuho Hirota, Kazumichi Machida, Masaaki Shimotomai, Seizo Omae
  • Patent number: 4739142
    Abstract: A method of producing a wire bonding ball for ball bonding a metal wire to an electrode of a semiconductor chip involves producing a ball by melting the top end of the metal wire by a discharge which is conducted by applying a high voltage between said metal wire and a discharge electrode in an inactive gas ambient. The metal wire is at a positive voltage said the discharge electrode is at a negative voltage, respectively. Next, a latter period discharge is conducted by inverting the voltage polarities of the discharge electrode elements. The metal wire used is a material capable of being oxidated.
    Type: Grant
    Filed: December 10, 1986
    Date of Patent: April 19, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Jitsuho Hirota, Kazumichi Machida, Masaaki Shimotomai
  • Patent number: 4705204
    Abstract: A ball-type bonding wire for use in connecting electrodes of semiconductor devices with external connector terminals and a method for producing such a wire in which the material of the wire can be a material such as aluminum, copper, palladium, alloys thereof, and combinations thereof. In forming the wire, the tip of the wire is disposed opposite a consumable electrode in an inert atmosphere, and a voltage is applied between the wire and the electrodes so as to cause a discharge between the tip of the wire and the consumable electrode. The polarity of this voltage is such that the majority of the energy contained in the discharge and supplied to the wire is produced when the wire is positive with respect to the consumable electrode.
    Type: Grant
    Filed: January 31, 1986
    Date of Patent: November 10, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Jitsuho Hirota, Kazumichi Machida, Noriko Watanabe