Abstract: This application describes systems and methods for facilitating memory access on flash drives. An example method may start with receiving a read command on a flash memory from a host specifying a logic block address (LBA). The flash memory may include a plurality of blocks grouped into a plurality of super blocks, and each of the plurality of blocks may include a plurality of pages. The method may further include determining a zone identification and an LBA offset based on the LBA; determining a flash physical address (FPA) corresponding to the LBA by accessing a mapping table stored in a random access memory (RAM) according to the zone identification and the LBA offset (e.g., the mapping table includes a plurality of FPAs arranged in a plurality of zones corresponding to the plurality of super blocks); and determining a page number and a block identification corresponding to the FPA.

Abstract: A solid state drive (SSD) includes an NAND memory and an SSD controller. The SSD controller includes an interface coupled to a host machine, a nonvolatile memory controller coupled to the interface, and a processor coupled to the nonvolatile memory controller. The SSD controller is configured to: receive, via the interface, a write command from the host machine; process, by the nonvolatile memory controller, the write command; transmit, from the nonvolatile memory controller to the processor, a system message; process, by the processor according to Zoned Namespaces (ZNS) protocol, the system message; obtain, by the nonvolatile memory controller via the interface, host data for storage from the host machine; and write the host data to the NAND memory based on a result of processing the system message. Processing the system message by the processor and obtaining the host data by the nonvolatile memory controller are executed in parallel.

Abstract: An SSD includes an MRAM, an NAND memory, and an SSD controller. The SSD controller is configured to receive first data from a host machine, save the first data to an SSD data buffer, fetch the first data from the SSD data buffer and write the first data to the MRAM via the MRAM controller, determine, by the data allocation circuit based on a characteristic of the first data, whether to save the first data to the MRAM or the NAND memory, and in response to determining saving the first data to the NAND memory, read the first data from the MRAM, write the first data to the NAND memory, and erase the first data from the MRAM.