Patents by Inventor Jiun-Liang Lin

Jiun-Liang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11931187
    Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 19, 2024
    Assignees: Chang Gung Medical Foundation Chang Gung Memorial Hospital at Keelung, Chang Gung Memorial Hospital, Linkou, Chang Gung University
    Inventors: Jiun-Jie Wang, Yi-Hsin Weng, Shu-Hang Ng, Jur-Shan Cheng, Yi-Ming Wu, Yao-Liang Chen, Wey-Yil Lin, Chin-Song Lu, Wen-Chuin Hsu, Chia-Ling Chen, Yi-Chun Chen, Sung-Han Lin, Chih-Chien Tsai
  • Publication number: 20200017545
    Abstract: The present disclosure provides compositions and methods for purifying a protein such as DNase using a chromatographic process. The methods include a single chromatographic step and the use of high concentration salt buffers. The present disclosure provides methods for purification of a protein from a sample comprising loading the sample onto a chromatography column and washing the column with at least one buffer having very high conductivity. In some embodiments, the wash buffer has a conductivity of about 50 mS/cm, about 60 mS/cm, about 70 mS/cm, about 80 mS/cm, or higher. In further embodiments, the protein is eluted from the column with an elution buffer following the wash with the very high conductivity buffer.
    Type: Application
    Filed: June 20, 2019
    Publication date: January 16, 2020
    Inventors: Gregory Scott Blank, Jiun-Liang Lin
  • Patent number: 10370408
    Abstract: The present disclosure provides compositions and methods for purifying a protein such as DNase using a chromatographic process. The methods include a single chromatographic step and the use of high concentration salt buffers.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: August 6, 2019
    Assignee: JHL Biotech, Inc.
    Inventors: Gregory Scott Blank, Jiun-Liang Lin
  • Publication number: 20170198008
    Abstract: The present disclosure provides compositions and methods for purifying a protein such as DNase using a chromatographic process. The methods include a single chromatographic step and the use of high concentration salt buffers.
    Type: Application
    Filed: June 25, 2015
    Publication date: July 13, 2017
    Inventors: Gregory Scott BLANK, Jiun-Liang LIN
  • Publication number: 20160314821
    Abstract: A method for accessing a multi-port memory module comprising a plurality of banks is provided, wherein the plurality of banks comprise at least a first bank, a second bank and a reference bank, and the method comprises: when first data is requested to be written into the first bank, reading reference data from the reference bank, and encoding the first data with the reference data to generate first encoded data, and writing the first encoded data into the first bank; and when second data is requested to be written into the second bank, reading the same reference data from the reference bank, and encoding the second data with the reference data to generate second encoded data, and writing the second encoded data into the second bank.
    Type: Application
    Filed: April 14, 2016
    Publication date: October 27, 2016
    Inventors: Kuo-Cheng Lu, Bo-Cheng Lai, Kun-Hua Huang, Jiun-Liang Lin
  • Publication number: 20160313923
    Abstract: A method for accessing a multi-port memory module comprising a plurality of banks is provided. In one embodiment, the method comprises: generating a plurality of parities, wherein each parity is generated according to bits of a portion of the banks; and writing the parities into the banks, respectively. In another embodiment, the method comprises: when two bits corresponding to two different addresses within a specific bank are requested to be read in response to two read commands, directly reading the bit corresponding to one of the two different address of the specific bank; and generating the bit corresponding to the other address of the specific bank by reading the bits of the other banks without the specific bank.
    Type: Application
    Filed: April 14, 2016
    Publication date: October 27, 2016
    Inventors: Bo-Cheng Lai, Jiun-Liang Lin, Kuo-Cheng Lu