Abstract: A pixel block transfer system has a shifter, at least two registers, an extractor and a mask. Parameter evaluation logic is used to generate most of the parameters needed in the pixel block transfer. The start address of the source block, the start address of the destination block, the number of pixels in the source block and the number of rows in the source block are input to the parameter evaluation logic. The parameter evaluation logic then determines the left shift number, the number of read data, the number of write data, the two write flag, the two read flag, the left mask number and the right mask number. The start addresses, the flags and the read and write numbers are sent to a state machine. These are used to control the pixel block transfer. The left shift number is sent to the shifter and the extractor. It signifies the number of pixels to be shifted left. The left and right mask numbers are sent to the mask to control which pixels are masked and, therefore, not modifiable.