Patents by Inventor Jiun-Ting Chen
Jiun-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240021442Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.Type: ApplicationFiled: August 1, 2023Publication date: January 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
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Publication number: 20230307381Abstract: A chip package structure is provided. The chip package structure includes a substrate. The chip package structure also includes a first chip structure and a second chip structure over the substrate. The chip package structure further includes an anti-warpage bar between the first chip structure and the second chip structure. In addition, the chip package structure includes an underfill layer between the first chip structure and the second chip structure and between the anti-warpage bar and the substrate. A topmost surface of the underfill layer is lower than a top surface of the anti-warpage bar.Type: ApplicationFiled: May 18, 2023Publication date: September 28, 2023Inventors: Jiun-Ting CHEN, Ying-Ching SHIH, Szu-Wei LU, Chih-Wei WU
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Patent number: 11694975Abstract: A chip package structure is provided. The chip package structure includes a substrate. The chip package structure also includes a first chip structure and a second chip structure over the substrate. The chip package structure further includes an anti-warpage bar over a first portion of the first chip structure and over a second portion of the second chip structure. A width of the anti-warpage bar overlapping the second portion of the second chip structure is greater than a width of the anti-warpage bar overlapping the first portion of the first chip structure.Type: GrantFiled: August 3, 2021Date of Patent: July 4, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jiun-Ting Chen, Ying-Ching Shih, Szu-Wei Lu, Chih-Wei Wu
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Publication number: 20220310411Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, an encapsulant, a protection layer and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The encapsulant is disposed over the interposer and laterally encapsulating the at least one semiconductor die. The connectors are disposed on the second surface of the interposer and electrically connected with the at least one semiconductor die through the interposer. The protection layer is disposed on the second surface of the interposer and surrounding the connectors. The sidewalls of the interposer include slanted sidewalls connected to the second surface, and the protection layer is in contact with the slant sidewalls of the interposer.Type: ApplicationFiled: March 26, 2021Publication date: September 29, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Tsung-Fu Tsai, Ying-Ching Shih, Ting-Yu Yeh, Chen-Hsuan Tsai
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Publication number: 20210366842Abstract: A chip package structure is provided. The chip package structure includes a substrate. The chip package structure also includes a first chip structure and a second chip structure over the substrate. The chip package structure further includes an anti-warpage bar over a first portion of the first chip structure and over a second portion of the second chip structure. A width of the anti-warpage bar overlapping the second portion of the second chip structure is greater than a width of the anti-warpage bar overlapping the first portion of the first chip structure.Type: ApplicationFiled: August 3, 2021Publication date: November 25, 2021Inventors: Jiun-Ting CHEN, Ying-Ching SHIH, Szu-Wei LU, Chih-Wei WU
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Patent number: 11088086Abstract: A method for forming a chip package structure is provided. The method includes bonding a first chip structure and a second chip structure to a surface of a substrate. The first chip structure and the second chip structure are spaced apart from each other. There is a first gap between the first chip structure and the second chip structure. The method includes removing a first portion of the first chip structure and a second portion of the second chip structure to form a trench partially in the first chip structure and the second chip structure and partially over the first gap. The method includes forming an anti-warpage bar in the trench. The anti-warpage bar is over the first chip structure, the second chip structure, and the first gap.Type: GrantFiled: April 26, 2019Date of Patent: August 10, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jiun-Ting Chen, Ying-Ching Shih, Szu-Wei Lu, Chih-Wei Wu
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Patent number: 10867962Abstract: A manufacturing method and a packaging process are provided. A package having a first die and a second die is provided. A circuit substrate having a first warpage level is provided. The package is mounted onto the circuit substrate and then heated under an elevated temperature to bond the package to the circuit substrate. The package heated under the elevated temperature is warped with a second warpage level, and the first warpage level is substantially in conformity with the second warpage level.Type: GrantFiled: October 4, 2018Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Ying-Ching Shih
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Publication number: 20200343197Abstract: A method for forming a chip package structure is provided. The method includes bonding a first chip structure and a second chip structure to a surface of a substrate. The first chip structure and the second chip structure are spaced apart from each other. There is a first gap between the first chip structure and the second chip structure. The method includes removing a first portion of the first chip structure and a second portion of the second chip structure to form a trench partially in the first chip structure and the second chip structure and partially over the first gap. The method includes forming an anti-warpage bar in the trench. The anti-warpage bar is over the first chip structure, the second chip structure, and the first gap.Type: ApplicationFiled: April 26, 2019Publication date: October 29, 2020Inventors: Jiun-Ting CHEN, Ying-Ching SHIH, Szu-Wei LU, Chih-Wei WU
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Patent number: 10600389Abstract: A display driving apparatus including a receiver circuit, a detection circuit and a driving circuit is provided. The receiver circuit receives the video image data at a first rate. The detection circuit is coupled to the receiver circuit. The detection circuit detects whether the video image data is a static image, and determines whether the display driving apparatus enters a power saving mode based on a detecting result. The driving circuit is coupled to the receiver circuit. The driving circuit drives the display panel. In the power saving mode, the receiver circuit continuously receives the video image data at the first rate, and periodically masks a part of the video image data according to the detecting result and outputs an unmasked part of the video image data to the driving circuit. Furthermore, a display driving method adapted for the foregoing display driving apparatus is also provided.Type: GrantFiled: November 15, 2017Date of Patent: March 24, 2020Assignee: Novatek Microelectronics Corp.Inventors: Chien-Yu Chen, Chien-Chou Hung, Wei-Ying Tu, Jiun-Ting Chen
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Publication number: 20200006286Abstract: A manufacturing method and a packaging process are provided. A package having a first die and a second die is provided. A circuit substrate having a first warpage level is provided. The package is mounted onto the circuit substrate and then heated under an elevated temperature to bond the package to the circuit substrate. The package heated under the elevated temperature is warped with a second warpage level, and the first warpage level is substantially in conformity with the second warpage level.Type: ApplicationFiled: October 4, 2018Publication date: January 2, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jiun-Ting Chen, Chih-Wei Wu, Szu-Wei Lu, Ying-Ching Shih
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Publication number: 20180075819Abstract: A display driving apparatus including a receiver circuit, a detection circuit and a driving circuit is provided. The receiver circuit receives the video image data at a first rate. The detection circuit is coupled to the receiver circuit. The detection circuit detects whether the video image data is a static image, and determines whether the display driving apparatus enters a power saving mode based on a detecting result. The driving circuit is coupled to the receiver circuit. The driving circuit drives the display panel. In the power saving mode, the receiver circuit continuously receives the video image data at the first rate, and periodically masks a part of the video image data according to the detecting result and outputs an unmasked part of the video image data to the driving circuit. Furthermore, a display driving method adapted for the foregoing display driving apparatus is also provided.Type: ApplicationFiled: November 15, 2017Publication date: March 15, 2018Applicant: Novatek Microelectronics Corp.Inventors: Chien-Yu Chen, Chien-Chou Hung, Wei-Ying Tu, Jiun-Ting Chen
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Patent number: 9858898Abstract: A display driving apparatus including a signal transmission interface, a timing control circuit and an image detection circuit is provided. The signal transmission interface is configured to receive video image data and output the video image data. The timing control circuit is configured to receive the video image data and drive a display panel based on the video image data. The image detection circuit determines whether the video image data is a static image and determines whether the display driving apparatus operates in a power-saving mode based on the determination result. Under the power-saving mode, the signal transmission interface masks a part of the video image data, so as not to output the masked video image data to the timing control circuit. Furthermore, a display driving method adapted for the foregoing display driving apparatus is also provided.Type: GrantFiled: June 7, 2016Date of Patent: January 2, 2018Assignee: Novatek Microelectronics Corp.Inventors: Chien-Yu Chen, Chien-Chou Hung, Wei-Ying Tu, Jiun-Ting Chen
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Publication number: 20160293141Abstract: A display driving apparatus including a signal transmission interface, a timing control circuit and an image detection circuit is provided. The signal transmission interface is configured to receive video image data and output the video image data. The timing control circuit is configured to receive the video image data and drive a display panel based on the video image data. The image detection circuit determines whether the video image data is a static image and determines whether the display driving apparatus operates in a power-saving mode based on the determination result. Under the power-saving mode, the signal transmission interface masks a part of the video image data, so as not to output the masked video image data to the timing control circuit. Furthermore, a display driving method adapted for the foregoing display driving apparatus is also provided.Type: ApplicationFiled: June 7, 2016Publication date: October 6, 2016Inventors: Chien-Yu Chen, Chien-Chou Hung, Wei-Ying Tu, Jiun-Ting Chen
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Publication number: 20140204068Abstract: A display driving apparatus including a signal transmission interface, a timing control circuit and an image detection circuit is provided. The signal transmission interface is configured to receive video image data and output the video image data. The timing control circuit is configured to receive the video image data and drive a display panel based on the video image data. The image detection circuit determines whether the video image data is a static image and determines whether the display driving apparatus operates in a power-saving mode based on the determination result. Under the power-saving mode, the signal transmission interface masks a part of the video image data, so as not: to output the masked video image data to the timing control circuit. Furthermore, a display driving method adapted for the foregoing display driving apparatus is also provided.Type: ApplicationFiled: July 17, 2013Publication date: July 24, 2014Inventors: Chien-Yu Chen, Chien-Chou Hung, Wei-Ying Tu, Jiun-Ting Chen
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Publication number: 20130257917Abstract: A display driving optimization method and a display driver are provided. The method includes following steps. Previous data and current data of at least a data line of a display panel are estimated to obtain an estimate result. A pre-charge operation or a charge-sharing operation of the data line is enabled or disabled according to the estimation result.Type: ApplicationFiled: November 28, 2012Publication date: October 3, 2013Applicant: NOVATEK MICROELECTRONICS CORP.Inventors: Yu-Hsun Peng, Jiun-Ting Chen, Yu-Shan Wai, Hsi-Ming Chen
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Patent number: 7982729Abstract: A driving signal generating device for staggering transition time of driving signals to prevent image crosstalk for a display device includes a receiving terminal, a first adjusting unit, a multiplexer, a second adjusting unit and a frame output controller. The receiving terminal receives a plurality of step grayscale waveforms. The first adjusting unit transforms the plurality of step grayscale waveforms into a plurality of initial grayscale waveforms and further adjusts widths of the plurality of initial grayscale waveforms according to a first predetermined value to generate a plurality of grayscale waveforms. The multiplexer selects a first grayscale waveform from the plurality of grayscale waveforms. The second adjusting unit then adjusts a width of the first grayscale waveform according to a second predetermined value to generate a second grayscale waveform. The frame output controller controls output of the first grayscale waveform and the second grayscale waveform.Type: GrantFiled: May 21, 2007Date of Patent: July 19, 2011Assignee: NOVATEK Microelectronics Corp.Inventors: Jiun-Ting Chen, Wen-Ping Chou, Feng-Jung Kuo, Kuei-Chung Chang
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Publication number: 20080174536Abstract: A driving signal generating device for staggering transition time of driving signals to prevent image crosstalk for a display device includes a receiving terminal, a first adjusting unit, a multiplexer, a second adjusting unit and a frame output controller. The receiving terminal receives a plurality of step grayscale waveforms. The first adjusting unit transforms the plurality of step grayscale waveforms into a plurality of initial grayscale waveforms and further adjusts widths of the plurality of initial grayscale waveforms according to a first predetermined value to generate a plurality of grayscale waveforms. The multiplexer selects a first grayscale waveform from the plurality of grayscale waveforms. The second adjusting unit then adjusts a width of the first grayscale waveform according to a second predetermined value to generate a second grayscale waveform. The frame output controller controls output of the first grayscale waveform and the second grayscale waveform.Type: ApplicationFiled: May 21, 2007Publication date: July 24, 2008Inventors: Jiun-Ting Chen, Wen-Ping Chou, Feng-Jung Kuo, Kuei-Chung Chang