Patents by Inventor Jiun-Yan Tsai

Jiun-Yan Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9466700
    Abstract: A lateral drain metal oxide semiconductor (LDMOS) device includes a well region having a second conductive type in a substrate, a body region having a first conductive type in the well region, a drift region having the second conductive type in the well region and spaced apart from the body region, a source region having the second conductive type in the body region, a drain region having the second conductive type in the drift region, a gate structure on the well region between the source region and the drain region, a shallow trench isolation (STI) structure in the drift region between the drain region and the source region, and a buried layer having the first conductive type in the well region under the drift region, a center of the buried layer being aligned with a center of the STI structure.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: October 11, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiun-Yan Tsai, Shuo-Lun Tu, Shih-Chin Lien, Shyi-Yuan Wu
  • Publication number: 20160087083
    Abstract: A lateral drain metal oxide semiconductor (LDMOS) device includes a well region having a second conductive type in a substrate, a body region having a first conductive type in the well region, a drift region having the second conductive type in the well region and spaced apart from the body region, a source region having the second conductive type in the body region, a drain region having the second conductive type in the drift region, a gate structure on the well region between the source region and the drain region, a shallow trench isolation (STI) structure in the drift region between the drain region and the source region, and a buried layer having the first conductive type in the well region under the drift region, a center of the buried layer being aligned with a center of the STI structure
    Type: Application
    Filed: December 1, 2015
    Publication date: March 24, 2016
    Inventors: Jiun-Yan TSAI, Shuo-Lun TU, Shih-Chin LIEN, Shyi-Yuan WU
  • Patent number: 9269806
    Abstract: A lateral drain metal oxide semiconductor (LDMOS) device includes a well region having a second conductive type in a substrate, a body region having a first conductive type in the well region, a drift region having the second conductive type in the well region and spaced apart from the body region, a source region having the second conductive type in the body region, a drain region having the second conductive type in the drift region, a gate structure on the well region between the source region and the drain region, a shallow trench isolation (STI) structure in the drift region between the drain region and the source region, and a buried layer having the first conductive type in the well region under the drift region, a center of the buried layer being aligned with a center of the STI structure.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: February 23, 2016
    Assignee: Macronix International Co., Ltd.
    Inventors: Jiun-Yan Tsai, Shuo-Lun Tu, Shih-Chin Lien, Shyi-Yuan Wu
  • Publication number: 20150097236
    Abstract: A lateral drain metal oxide semiconductor (LDMOS) device includes a well region having a second conductive type in a substrate, a body region having a first conductive type in the well region, a drift region having the second conductive type in the well region and spaced apart from the body region, a source region having the second conductive type in the body region, a drain region having the second conductive type in the drift region, a gate structure on the well region between the source region and the drain region, a shallow trench isolation (STI) structure in the drift region between the drain region and the source region, and a buried layer having the first conductive type in the well region under the drift region, a center of the buried layer being aligned with a center of the STI structure.
    Type: Application
    Filed: October 3, 2013
    Publication date: April 9, 2015
    Applicant: Macronix International Co., Ltd.
    Inventors: Jiun-Yan Tsai, Shuo-Lun Tu, Shih-Chin Lien, Shyi-Yuan Wu