Patents by Inventor Jiunn-Liang Yu

Jiunn-Liang Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10770602
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: September 8, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Patent number: 10763288
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: September 1, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsin-Hui Lee, Han-Liang Tseng, Jiunn-Liang Yu, Kwang-Ming Lin, Yin Chen, Si-Twan Chen, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
  • Publication number: 20200266226
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate. The substrate includes a plurality of pixels. The semiconductor device also includes a light collimator layer disposed on the substrate. The light collimator layer includes a transparent connection feature disposed on the substrate, and a plurality of transparent pillars disposed on the transparent connection feature. The plurality of transparent pillars cover the plurality of pixels, and the transparent connection feature connects to the plurality of transparent pillars. The plurality of transparent pillars and the transparent connection feature are made of a first material which includes a transparent material. The light collimator layer also includes a plurality of first light-shielding features disposed on the transparent connection feature. The top surface of one of the transparent pillars is level with the top surface of one of the first light-shielding features.
    Type: Application
    Filed: February 15, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200266305
    Abstract: An optical sensor includes pixels disposed in a substrate and a light collimating layer disposed on the substrate. The light collimating layer includes a first light-shielding layer, first transparent pillars, a second light-shielding layer, and second transparent pillars. The first light-shielding layer is disposed on the substrate. The first transparent pillars through the first light-shielding layer are correspondingly disposed on the pixels. The second light-shielding layer is disposed on the first light-shielding layer and the first transparent pillars. The second transparent pillars through the second light-shielding layer are correspondingly disposed on the first transparent pillars. The top surface area of each of the first transparent pillars is not equal to the bottom surface area of each of the second transparent pillars.
    Type: Application
    Filed: February 20, 2019
    Publication date: August 20, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200251506
    Abstract: An optical sensor includes pixels disposed in a substrate. A light collimating layer is disposed on the substrate and includes a transparent layer, a light-shielding layer, and transparent pillars. The transparent layer blanketly disposed on the substrate covers the pixels and the region between the pixels. The light-shielding layer is disposed on the transparent layer and between the transparent pillars. The transparent pillars penetrating through the light-shielding layer are correspondingly disposed on the pixels.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Publication number: 20200249490
    Abstract: An optical sensor includes a plurality of pixels disposed in a substrate and a light collimating layer. The light collimating layer is disposed on the substrate. The light collimating layer includes a light-shielding layer, a plurality of transparent pillars, and a plurality of first dummy transparent pillars. The light-shielding layer is disposed on the substrate. The plurality of transparent pillars pass through the light-shielding layer and are disposed correspondingly on the plurality of pixels. The plurality of first dummy transparent pillars that pass through the light-shielding layer are disposed on a first peripheral region of the light collimating layer, wherein the plurality of first dummy transparent pillars surround the plurality of transparent pillars from a top view.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 6, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsin-Hui LEE, Han-Liang TSENG, Jiunn-Liang YU, Kwang-Ming LIN, Yin CHEN, Si-Twan CHEN, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
  • Patent number: 6191019
    Abstract: A method for preventing void formation in a gate of a transistor formed in a substrate is disclosed. The method comprises: forming a gate oxide layer on the substrate; forming a polysilicon layer on the gate oxide layer; performing an ion implantation on the polysilicon layer, the ion implantation performed with a power approximately 30 KeV and a dosage about more than 1015 atoms/cm2; and forming a silicide layer on the polysilicon layer.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: February 20, 2001
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Cherng Liao, Jiunn-Liang Yu, Chan-Jen Kuo, Chi-San Wu, Yun-Chi Jiang
  • Patent number: 6057218
    Abstract: The present invention discloses a method for simultaneously manufacturing a poly gate and a polycide gate which requires only one gate oxide layer deposition and one polysilicon layer deposition steps by incorporating a protective layer, primarily an oxide layer, which acts as a mask of a silicide. The present invention not only simplifies the process but also avoids a residual spacer in the gate. The advantages also includes widening the process window, controlling the gate channel and avoiding the gate top loss.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: May 2, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Jiunn-Liang Yu, Chih-Cherng Liao, Chen-Jen Kuo