Patents by Inventor Jiunn-Nan Hwang

Jiunn-Nan Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10916854
    Abstract: An antenna structure includes a radiative antenna element disposed in a first conductive layer, a reflector ground plane disposed in a second conductive layer under the first conductive layer, a feeding network comprising a transmission line disposed in a third conductive layer under the second conductive layer, and at least one coupling element disposed in proximity to a feeding terminal that electrically couples one end of the transmission line to the radiative antenna element. The coupling element is capacitively coupled with the feeding terminal.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: February 9, 2021
    Assignee: MEDIATEK INC.
    Inventors: Jiunn-Nan Hwang, Yi-Chieh Lin, Yen-Ju Lu, Shih-Chia Chiu, Wen-Chou Wu
  • Publication number: 20190305428
    Abstract: An antenna structure includes a radiative antenna element disposed in a first conductive layer, a reflector ground plane disposed in a second conductive layer under the first conductive layer, a feeding network comprising a transmission line disposed in a third conductive layer under the second conductive layer, and at least one coupling element disposed in proximity to a feeding terminal that electrically couples one end of the transmission line to the radiative antenna element. The coupling element is capacitively coupled with the feeding terminal.
    Type: Application
    Filed: March 6, 2019
    Publication date: October 3, 2019
    Inventors: Jiunn-Nan Hwang, Yi-Chieh Lin, Yen-Ju Lu, Shih-Chia Chiu, Wen-Chou Wu
  • Patent number: 9543943
    Abstract: A digital circuit comprises a plurality of functional circuits and a finite state machine. Each functional circuit comprises a digital macro, a resistance control device and at least one device with capacitance. The digital macro is coupled to a ground. The resistance control device is electrically connected between the digital macro and an always-on power mesh. The at least one device with capacitance is electrically connected between the resistance control device and the ground. The finite state machine is electrically connected to the resistance control device, and is configured to adjust the resistance of the resistance control device.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: January 10, 2017
    Assignee: MEDIATEK INC.
    Inventors: Yuan-Hung Chung, Jiunn-Nan Hwang, Yipin Wu, Tsung-Ying Tsai, Chin-Wei Huang
  • Publication number: 20160065182
    Abstract: A digital circuit comprises a plurality of functional circuits and a finite state machine. Each functional circuit comprises a digital macro, a resistance control device and at least one device with capacitance. The digital macro is coupled to a ground. The resistance control device is electrically connected between the digital macro and an always-on power mesh. The at least one device with capacitance is electrically connected between the resistance control device and the ground. The finite state machine is electrically connected to the resistance control device, and is configured to adjust the resistance of the resistance control device.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 3, 2016
    Inventors: Yuan-Hung Chung, Jiunn-Nan Hwang, Yipin Wu, Tsung-Ying Tsai, Chin-Wei Huang