Abstract: A data management method, a memory controller and an embedded memory storage apparatus are provided. The embedded memory storage apparatus has a plurality of physical blocks and each of the physical blocks has fast physical pages and slow physical pages. The method includes detecting a status of a state indication unit. The method further includes automatically reading data stored in the embedded memory storage apparatus, using the fast and slow physical pages of the embedded memory storage apparatus to re-store the data and marking status of the state indication unit as a second status when the status of the state indication unit is a first status. Accordingly, the storage space of the embedded memory storage apparatus can be efficiently used.

Abstract: A controller capable of preventing spread of computer viruses is provided. The controller includes a microprocessor unit, and a first interface unit, a second interface unit, a comparing unit and a filter unit which are coupled to the microprocessor unit. The first interface unit is coupled to a storage medium, and the second interface unit is coupled to a computer host. The comparing unit determines whether data read form the storage medium by the computer host is an automatic executing file. And, the filter unit replaces the read data with a predetermined data and transmit the predetermined data to the computer host when the read data is the automatic executing file. Accordingly, the controller is capable of preventing the spread of the computer viruses designed in an automatic executing file.

Abstract: A flash memory control circuit including a microprocessor unit, a first interface unit for connecting a flash memory, a second interface unit for connecting a computer host, an error correcting unit, a memory management unit, and a marking unit is provided. The memory management unit divides each page in the flash memory into a plurality of data bit areas, and a plurality of redundancy bit areas and a plurality of error correcting bit areas corresponding to the data bit areas, wherein each of the data bit areas has a plurality of sectors for respectively storing a sector data. The marking unit stores a data accuracy mark corresponding to each sector data in the corresponding redundancy bit area to record the status of the sector data. Thereby, the flash memory controller can effectively identify error data in the flash memory by using the error correcting codes and the data accuracy marks.

Abstract: A data writing method for a flash memory is provided. The data writing method includes: dividing a new data into at lease one sub-data by the size of a writing unit; selecting one of a plurality of spare blocks from the flash memory as a substitute block for substituting a data block, wherein the new data is to be written into the data block; sequentially writing the sub-data having the size of the writing unit into the substitute block in the writing unit; and storing the sub-data not having the size of the writing unit into a temporary area. The writing efficiency of the flash memory can be improved by temporarily storing the sub-data not having the size of the writing unit into the temporary area and then writing the sub-data not having the size of the writing unit with subsequent data into the substitute block.

Abstract: A data management method, a memory controller and an embedded memory storage apparatus are provided. The embedded memory storage apparatus has a plurality of physical blocks and each of the physical blocks has fast physical pages and slow physical pages. The method includes detecting a status of a state indication unit. The method further includes automatically reading data stored in the embedded memory storage apparatus, using the fast and slow physical pages of the embedded memory storage apparatus to re-store the data and marking status of the state indication unit as a second status when the status of the state indication unit is a first status. Accordingly, the storage space of the embedded memory storage apparatus can be efficiently used.

Abstract: A data writing method, and a flash storage system and a controller using the same are provided. The method includes grouping the physical blocks of a flash memory into the physical blocks of a data area, a spare area and a special area. The method also includes writing the update data into the corresponding physical block of the special area when the update data is the single accessing unit. The method may include moving a part of valid data in a physical block mapping a logical block where the update data is belonged into a physical block of the spare area during each data writing command. Accordingly, it is possible to reduce the response time for each data writing command, thereby preventing a time-out problem caused by a flash memory having a large erasing unit configured at the flash storage system.

Abstract: A non-volatile memory storage system including a transmission interface, a memory module, and a controller is provided. The memory module includes first and second non-volatile memory chips. The first and the second non-volatile memory chips can be simultaneously enabled by receiving a chip enable signal from the controller via a chip enable pin. When the controller performs a multichannel access, the controller provides an access instruction to the first and second non-volatile memory chip, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. When the controller performs a single channel access, the controller provides the access signal to one of the first and second non-volatile memory chips, and provides a non-access instruction to the other one, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal.

Abstract: A flash memory control circuit including a microprocessor unit, a first interface unit for connecting a flash memory, a second interface unit for connecting a computer host, an error correcting unit, a memory management unit, and a marking unit is provided. The memory management unit divides each page in the flash memory into a plurality of data bit areas, and a plurality of redundancy bit areas and a plurality of error correcting bit areas corresponding to the data bit areas, wherein each of the data bit areas has a plurality of sectors for respectively storing a sector data. The marking unit stores a data accuracy mark corresponding to each sector data in the corresponding redundancy bit area to record the status of the sector data. Thereby, the flash memory controller can effectively identify error data in the flash memory by using the error correcting codes and the data accuracy marks.

Abstract: A controller capable of preventing spread of computer viruses is provided. The controller includes a microprocessor unit, and a first interface unit, a second interface unit, a comparing unit and a filter unit which are coupled to the microprocessor unit. The first interface unit is coupled to a storage medium, and the second interface unit is coupled to a computer host. The comparing unit determines whether data read form the storage medium by the computer host is an automatic executing file. And, the filter unit replaces the read data with a predetermined data and transmit the predetermined data to the computer host when the read data is the automatic executing file. Accordingly, the controller is capable of preventing the spread of the computer viruses designed in an automatic executing file.

Abstract: A storage system including a storage unit, a connector, and a controller is provided. A personal identification number (PIN) message digest and a cipher text are stored in the storage unit. When the storage system is connected to a host system through the connector, the controller requests a password from the host system and generates a message digest through a one-way hash function according to the password. After that, the controller determinates whether the message digest matches the PIN message digest. If the message digest matches the PIN message digest, the controller decrypts the cipher text in the storage unit through a first encryption/decryption function according to the password to obtain an encryption/decryption key. Eventually, the controller encrypts and decrypts user data through a second encryption/decryption function according to the encryption/decryption key. Thereby, the user data stored in the storage system can be effectively protected.

Abstract: A block management method for a flash memory chip having multiple planes is provided, wherein each plane has a plurality of physical blocks. The method includes disposing a plurality of physical units, wherein each physical unit includes a physical block of each plane, and the physical blocks in the physical unit have a simultaneously-operable relationship. The method also includes writing data in a single plane access mode when a host system does not update all the physical blocks in an updated the physical unit. The method further includes writing the data in a multi-planes access mode when the host system updates all the physical blocks in the updated physical unit, wherein the physical blocks for writing the data have the simultaneously-operable relationship.

Abstract: A non-volatile memory storage system including a transmission interface, a memory module, and a controller is provided. The memory module includes first and second non-volatile memory chips. The first and the second non-volatile memory chips can be simultaneously enabled by receiving a chip enable signal from the controller via a chip enable pin. When the controller performs a multichannel access, the controller provides an access instruction to the first and second non-volatile memory chip, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal. When the controller performs a single channel access, the controller provides the access signal to one of the first and second non-volatile memory chips, and provides a non-access instruction to the other one, after enabling the first non-volatile memory chip and the second non-volatile memory chip with the chip enable signal.

Abstract: A data writing method, and a flash storage system and a controller using the same are provided. The method includes grouping the physical blocks of a flash memory into the physical blocks of a data area, a spare area and a special area. The method also includes writing the update data into the corresponding physical block of the special area when the update data is the single accessing unit. The method may include moving a part of valid data in a physical block mapping a logical block where the update data is belonged into a physical block of the spare area during each data writing command. Accordingly, it is possible to reduce the response time for each data writing command, thereby preventing a time-out problem caused by a flash memory having a large erasing unit configured at the flash storage system.

Abstract: A method for managing blocks is provided. In the method, a plurality of flash memories is divided into a plurality of block program units, and blocks mapped to each of the block program units are recorded, wherein each of the block program units maps to at least two blocks. Next, available states of the block program units are respectively determined according to good or bad states of the mapped blocks. Final, good blocks within the block program units are recorded, so as to provide the good blocks within the block program units according to the record for being written with data. Accordingly, it is possible to fully utilize the blocks in the flash memories.

Abstract: A data writing method for a flash memory is provided. The data writing method includes: dividing a new data into at lease one sub-data by the length of a writing unit; selecting one of a plurality of spare blocks from the flash memory as a substitute block for substituting a data block, wherein the new data is to be written into the data block; sequentially writing the sub-data having the length of the writing unit into the substitute block in the writing unit; and storing the sub-data not having the length of the writing unit into a temporary area. The writing efficiency of the flash memory can be improved by temporarily storing the sub-data not having the length of the writing unit into the temporary area and then writing the sub-data not having the length of the writing unit with subsequent data into the substitute block.

Abstract: A method of a flash memory storage device using a copy back command is provided. An error correction rule is adopted to determine whether or not data errors occurred in the un-amended data stored in the page, wherein when it is determined that data errors has occurred in the un-amended data, then a data transfer command is executed, thereby enabling the flash memory storage device to use the block having a faster transferring speed to executing the copy back command. Thus, the data in the flash memory storage device is not only correct and complete but also the stability of the system is promoted.

Abstract: The present invention discloses a multimedia player, which has a controller chip separately connected to an audio/video transmission interface, a hard disk, a USB connecting interface and a control interface, and the controller chip installs a digital signal processing (DSP) chip and a USB controller. Since a hard disk is used as a storage device for the multimedia player, the multimedia player can have more data storage spaces to lower the cost of video recording or audio recording, and thus further lowering the price of the product and stimulating consumer's desire for the purchase. The USB connecting interface is connected to an electronic product having a host, so that the multimedia player can directly play the data stored in the electronic product having a host or store data into the hard disk of the multimedia player.

Abstract: A card reader with PCI Express includes a microcontroller connected separately to a flash memory connecting interface and a peripheral component interconnect (PCI) Express connecting interface, and the microcontroller has a memory card interface and a PCI Express interface, such that when the memory card is coupled to a PCI Express disposed at a host through the PCI Express connecting interface, the host can access data in the memory card connected to the memory card connecting interface and the access rate can meet the standard of the transmission rate of the PCI Express so as to maximize the transmission rate of the card reader.

Abstract: A flash memory storage device with PCI Express includes a microcontroller connected separately to a flash memory and a peripheral component interconnect (PCI) Express connecting interface, and the microcontroller has a flash memory interface and a PCI Express interface, such that when the storage device is coupled to a PCI Express disposed at a host through the PCI Express connecting interface, the host can save data into the storage device and the access rate can meet the standard of the transmission rate of the PCI Express so as to maximize the transmission rate of the storage device.

Abstract: A method of a flash memory storage device using a copy back command is provided. An error correction rule is adopted to determine whether or not data errors occurred in the un-amended data stored in the page, wherein when it is determined that data errors has occurred in the un-amended data, then a data transfer command is executed, thereby enabling the flash memory storage device to use the block having a faster transferring speed to executing the copy back command. Thus, the data in the flash memory storage device is not only correct and complete but also the stability of the system is promoted.