Patents by Inventor Jiyin Xu

Jiyin Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11638696
    Abstract: The present invention provides a method for preparing an additive-free cell-wall-broken granule of a Chinese medicinal material. The cell-wall-broken granule is obtained by medicinal material concocting and grinding, first cell-wall-breaking and grinding, screening, second wall-breaking and grinding, mixing, pelleting, and granulating and sieving. The obtained granule has a moderate tightness, a relatively rapid dissolution and diffusion and a good uniformity, overcoming problems of a difficulty of dissolution and diffusion and a poor uniformity of the existing cell-wall-broken granules.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: May 2, 2023
    Assignee: ZHONGSHAN ZHONGZHI PHARMACEUTICAL GROUP CO., LTD.
    Inventors: Jinle Cheng, Zhitian Lai, Jiyin Xu, Yongjun Chen, Wen Deng, Lihua Peng, Weixuan Chen, Jinmei Chen, Yina Wang, Yanling Liang, Weilin Qiao, Xiaojun Cao
  • Publication number: 20210030684
    Abstract: The present invention provides a method for preparing an additive-free cell-wall-broken granule of a Chinese medicinal material. The cell-wall-broken granule is obtained by medicinal material concocting and grinding, first cell-wall-breaking and grinding, screening, second wall-breaking and grinding, mixing, pelleting, and granulating and sieving. The obtained granule has a moderate tightness, a relatively rapid dissolution and diffusion and a good uniformity, overcoming problems of a difficulty of dissolution and diffusion and a poor uniformity of the existing cell-wall-broken granules.
    Type: Application
    Filed: October 21, 2020
    Publication date: February 4, 2021
    Applicant: ZHONGSHAN ZHONGZHI PHARMACEUTICAL GROUP CO., LTD.
    Inventors: Jinle CHENG, Zhitian LAI, Jiyin XU, Yongjun CHEN, Wen DENG, Lihua PENG, Weixuan CHEN, Jinmei CHEN, Yina WANG, Yanling LIANG, Weilin QIAO, Xiaojun CAO
  • Patent number: 10777570
    Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: September 15, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Tadashi Nakamura, Jin Liu, Kazuya Tokunaga, Marika Gunji-Yoneoka, Matthias Baenninger, Hiroyuki Kinoshita, Murshed Chowdhury, Jiyin Xu
  • Publication number: 20180277567
    Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.
    Type: Application
    Filed: May 25, 2018
    Publication date: September 27, 2018
    Inventors: Tadashi Nakamura, Jin Liu, Kazuya Tokunaga, Marika Gunji-Yoneoka, Matthias Baenninger, Hiroyuki Kinoshita, Murshed Chowdhury, Jiyin Xu
  • Patent number: 9991280
    Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: June 5, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Tadashi Nakamura, Jin Liu, Kazuya Tokunaga, Marika Gunji-Yoneoka, Matthias Baenninger, Hiroyuki Kinoshita, Murshed Chowdhury, Jiyin Xu, Dai Iwata, Hiroyuki Ogawa, Kazutaka Yoshizawa, Yasuaki Yonemochi
  • Patent number: 9978768
    Abstract: A method of manufacturing a semiconductor device includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a substrate, forming a memory opening through the stack, forming a layer stack including a memory material layer, a tunneling dielectric layer, and a first semiconductor material layer in the memory opening, forming a protective layer over the first semiconductor channel layer, physically exposing a semiconductor surface underneath the layer stack by anisotropically etching horizontal portions of the protective layer and the layer stack at a bottom portion of the memory opening, removing a remaining portion of the protective layer selective to the first semiconductor channel layer, and forming a second semiconductor channel layer on the first semiconductor channel layer.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: May 22, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jiyin Xu, Ryoichi Honma, Syo Fukata
  • Publication number: 20180006041
    Abstract: A method of manufacturing a semiconductor device includes forming a stack of alternating layers comprising insulating layers and spacer material layers over a substrate, forming a memory opening through the stack, forming a layer stack including a memory material layer, a tunneling dielectric layer, and a first semiconductor material layer in the memory opening, forming a protective layer over the first semiconductor channel layer, physically exposing a semiconductor surface underneath the layer stack by anisotropically etching horizontal portions of the protective layer and the layer stack at a bottom portion of the memory opening, removing a remaining portion of the protective layer selective to the first semiconductor channel layer, and forming a second semiconductor channel layer on the first semiconductor channel layer.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 4, 2018
    Inventors: Jiyin XU, Ryoichi HONMA, Syo FUKATA
  • Publication number: 20170236835
    Abstract: An annular dielectric spacer can be formed at a level of a joint-level dielectric material layer between vertically neighboring pairs of alternating stacks of insulating layers and spacer material layers. After formation of a memory opening through multiple alternating stacks and formation of a memory film therein, an anisotropic etch can be performed to remove a horizontal bottom portion of the memory film. The annular dielectric spacer can protect underlying portions of the memory film during the anisotropic etch. In addition, a silicon nitride barrier may be employed to suppress hydrogen diffusion at an edge region of peripheral devices.
    Type: Application
    Filed: February 16, 2017
    Publication date: August 17, 2017
    Inventors: Tadashi NAKAMURA, Jin LIU, Kazuya TOKUNAGA, Marika GUNJI-YONEOKA, Matthias BAENNINGER, Hiroyuki KINOSHITA, Murshed CHOWDHURY, Jiyin XU, Dai IWATA, Hiroyuki OGAWA, Kazutaka YOSHIZAWA, Yasuaki YONEMOCHI
  • Patent number: 9543318
    Abstract: An alternating stack of insulator layers and spacer material layers is formed over a substrate. Stepped surfaces are formed in a contact region in which contact via structures are to be subsequently formed. An epitaxial semiconductor pedestal can be formed by a single epitaxial deposition process that is performed after formation of the stepped surfaces and prior to formation of memory openings, or a combination of a first epitaxial deposition process performed prior to formation of memory openings and a second epitaxial deposition process performed after formation of the memory openings. The epitaxial semiconductor pedestal can have a top surface that is located above a topmost surface of the alternating stack. The spacer material layers are formed as, or can be replaced with, electrically conductive layers. Backside contact via structures can be subsequently formed.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: January 10, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Zhenyu Lu, Daxin Mao, Koji Miyata, Junichi Ariyoshi, Johann Alsmeier, George Matamis, Wenguang Shi, Jiyin Xu, Xiaolong Hu
  • Patent number: 9502471
    Abstract: A multi-tier memory device is formed over a substrate such that memory stack structures extend through an alternating stack of insulating layers and electrically conductive layers within each tier. Bit lines are formed between an underlying tier having drain regions over semiconductor channels and an overlying tier having drain regions under semiconductor channel, such that the bit lines are shared between the underlying tier and the overlying tier. Source lines can be formed over each tier in which source regions overlie semiconductor channels and drain regions. If another tier is present above the source lines, the source lines can be shared between two vertically neighboring tiers.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: November 22, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Zhenyu Lu, Henry Chien, Johann Alsmeier, Koji Miyata, Tong Zhang, Man Mui, James Kai, Wenguang Shi, Wei Zhao, Xiaolong Hu, Jiyin Xu, Gerrit Jan Hemink, Christopher Petti
  • Patent number: 9343358
    Abstract: A first stack of alternating layers including first insulating layers and first sacrificial material layers is formed on a substrate. Dielectric oxide layers applying compressive stress are formed on the top surface of the first stack and on the bottom surface of the substrate. A second stack of alternating layers including second insulating layers and second sacrificial material layers is formed over the top dielectric oxide layer. After formation of lateral recesses by removal of the first and second sacrificial material layers, a bottom dielectric oxide layer is removed. A conductive material applying a tensile stress is deposited into the backside recesses to form electrically conductive layers. The compressive stress applied by the top dielectric oxide layer partially cancels the tensile stress applied by the electrically conductive layers, and reduces the curvature of the substrate that has a concave bottom surface.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: May 17, 2016
    Assignee: SANDISK TECHNOLOGIES INC.
    Inventor: Jiyin Xu