Patents by Inventor Jo Shimizu

Jo Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200381010
    Abstract: A card reader includes a writing coil that is provided to a magnetic head for recording magnetic data in a magnetic card, and a drive circuit that supplies a write current to the writing coil. The drive circuit is a chopping circuit that supplies a chopping current, on/off of which is switched in a specified cycle, as the write current to the writing coil. An on/off cycle of the chopping current is a cycle in which a length of a magnetized pattern in a recording direction is shorter than a reading gap formed in a core around which the writing coil is wound or a core around which a reading coil being separately provided from the writing coil is wound, the magnetized pattern in the recording direction being formed in the magnetic card by the chopping current in a period including one each of the on and the off.
    Type: Application
    Filed: December 4, 2018
    Publication date: December 3, 2020
    Applicant: NIDEC SANKYO CORPORATION
    Inventors: Jo TANAKA, Yohei SHIMIZU, YUFEI Gu
  • Patent number: 10388517
    Abstract: An epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 ?·cm.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: August 20, 2019
    Assignee: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Patent number: 8847203
    Abstract: A Group III nitride epitaxial laminate substrate comprising a substrate, a buffer and a main laminate in this order, wherein the buffer includes an initial growth layer, a first superlattice laminate and a second superlattice laminate in this order, the first superlattice laminate includes five to 20 sets of first AlN layers and second GaN layers, the first AlN layers and the second GaN layers being alternately stacked, and each one set of the first AlN layer and the second GaN layer has a thickness of less than 44 nm, the second superlattice laminate includes a plurality of sets of first layers made of an AlN material or an AlGaN material and second layers made of an AlGaN material having a different band gap from the first layers, the first and second layers being alternately stacked.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: September 30, 2014
    Assignee: Dowa Electronics Materials Co, Ltd.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Patent number: 8426893
    Abstract: An epitaxial substrate for electronic devices is provided, which can improve vertical breakdown voltage and provides a method of producing the same. The epitaxial substrate includes a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a Ba1Alb1Gac1Ind1N material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a Ba2Alb2Gac2Ind2N material and a second layer made of a Ba3Alb3Gac3Ind3N material having a different band gap from the first layer.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: April 23, 2013
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata, Ryo Sakamoto, Tsuneo Ito
  • Patent number: 8410472
    Abstract: An epitaxial substrate for an electronic device having a Si single crystal substrate, a buffer as an insulating layer formed on the Si single crystal substrate, and a main laminated body formed by plural group III nitride layers epitaxially grown on the buffer, wherein a lateral direction of the epitaxial substrate is defined as an electric current conducting direction. The buffer including at least an initially grown layer in contact with the Si single crystal substrate and a superlattice laminate constituted of a superlattice multilayer structure on the initially grown layer.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: April 2, 2013
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Patent number: 8344356
    Abstract: A semiconductor material is provided comprising: a composition graded layer, formed on a Si substrate or an interlayer formed thereon, comprising a composition of AlXGa1-XN graded such that a content ratio of Al in the composition decreases continuously or discontinuously in a crystal growing direction; a superlattice composite layer, formed on the composition graded layer, comprising a high Al-containing layer comprising a composition of AlYGa1-YN and a low Al-containing layer comprising a composition of AlZGa1-ZN that are laminated alternately; and a nitride semiconductor layer formed on the superlattice composite layer.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: January 1, 2013
    Assignees: Dowa Electronics Materials Co., Ltd., National University Corporation Nagoya Institute of Technology
    Inventors: Ryo Sakamoto, Jo Shimizu, Tsuneo Ito, Takashi Egawa
  • Publication number: 20120273759
    Abstract: An epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 ?·cm.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 1, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya IKUTA, Jo SHIMIZU, Tomohiko SHIBATA
  • Publication number: 20120223328
    Abstract: A Group III nitride epitaxial laminate substrate comprising a substrate, a buffer and a main laminate in this order, wherein the buffer includes an initial growth layer, a first superlattice laminate and a second superlattice laminate in this order, the first superlattice laminate includes five to 20 sets of first AlN layers and second GaN layers, the first AlN layers and the second GaN layers being alternately stacked, and each one set of the first AlN layer and the second GaN layer has a thickness of less than 44 nm, the second superlattice laminate includes a plurality of sets of first layers made of an AlN material or an AlGaN material and second layers made of an AlGaN material having a different band gap from the first layers, the first and second layers being alternately stacked.
    Type: Application
    Filed: November 4, 2010
    Publication date: September 6, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Publication number: 20120091435
    Abstract: An epitaxial substrate for electronic devices is provided, which can improve vertical breakdown voltage and provides a method of producing the same. The epitaxial substrate includes a conductive SiC single crystal substrate, a buffer as an insulating layer on the SiC single crystal substrate, and a main laminate formed by epitaxially growing a plurality of Group III nitride layers on the buffer. Further, the buffer includes at least an initial growth layer in contact with the SiC single crystal substrate and a superlattice laminate having a superlattice multi-layer structure on the initial growth layer. The initial growth layer is made of a Ba1Alb1Gac1Ind1N material. Furthermore, the superlattice laminate is configured by alternately stacking a first layer made of a Ba2Alb2Gac2Ind2N material and a second layer made of a Ba3Alb3Gac3Ind3N material having a different band gap from the first layer.
    Type: Application
    Filed: May 10, 2010
    Publication date: April 19, 2012
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata, Ryo Sakamoto, Tsuneo Ito
  • Publication number: 20110298009
    Abstract: An object of the present invention is to provide an epitaxial substrate for an electronic device, in which a lateral direction of the substrate is defined as a main current conducting direction and a warp configuration of the epitaxial substrate is adequately controlled, as well as a method of producing the epitaxial substrate. Specifically, the epitaxial substrate for an electron device, including: a Si single crystal substrate; and a Group III nitride laminated body formed by epitaxially growing plural Group III nitride layers on the Si single crystal substrate, wherein a lateral direction of the epitaxial substrate is defined as a main current conducting direction, is characterized in that the Si single crystal substrate is a p-type substrate having a specific resistance value of not larger than 0.01 ?·cm.
    Type: Application
    Filed: November 18, 2009
    Publication date: December 8, 2011
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Publication number: 20110240962
    Abstract: An epitaxial substrate for an electronic device having a Si single crystal substrate, a buffer as an insulating layer formed on the Si single crystal substrate, and a main laminated body formed by plural group III nitride layers epitaxially grown on the buffer, wherein a lateral direction of the epitaxial substrate is defined as an electric current conducting direction. The buffer including at least an initially grown layer in contact with the Si single crystal substrate and a superlattice laminate constituted of a superlattice multilayer structure on the initially grown layer.
    Type: Application
    Filed: December 14, 2009
    Publication date: October 6, 2011
    Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.
    Inventors: Tetsuya Ikuta, Jo Shimizu, Tomohiko Shibata
  • Publication number: 20110001127
    Abstract: A semiconductor material is provided comprising: a composition graded layer, formed on a Si substrate or an interlayer formed thereon, comprising a composition of AlXGa1-XN graded such that a content ratio of Al in the composition decreases continuously or discontinuously in a crystal growing direction; a superlattice composite layer, formed on the composition graded layer, comprising a high Al-containing layer comprising a composition of AlYGa1-YN and a low Al-containing layer comprising a composition of AlZGa1-ZN that are laminated alternately; and a nitride semiconductor layer formed on the superlattice composite layer.
    Type: Application
    Filed: December 17, 2008
    Publication date: January 6, 2011
    Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., NATIONAL UNIVERSITY CORPORATION NAGOYA INSTITUTE OF TECHNOLOGY
    Inventors: Ryo Sakamoto, Jo Shimizu, Tsuneo Ito, Takashi Egawa