Abstract: A series voltage regulator having a regulating transistor (T.sub.1) arranged with its emitter-to-collector path in a series arm of the regulator, the base of which is controlled via a control transistor (T.sub.2) by a first differential amplifier (V) which compares a reference voltage (U.sub.REF) with a voltage proportional to the voltage (U.sub.2) of the regulator output. A differential circuit (V.sub.2) which compares the collector-to-emitter voltage of the regulating transistor (T.sub.1) with an auxiliary voltage (U.sub.3) is provided, the output of which is followed by a current limiting circuit (T.sub.3) which acts upon control transistor (T.sub.2). The auxiliary voltage (U.sub.3) is larger than the collector-to-emitter voltage of the regulating transistor (T.sub.1) which occurs at the beginning of the saturation state of the regulating transistor. The current limiting circuit (T.sub.3) limits the current delivered by the control transistor (T.sub.2) to the base of the regulating transistor (T.sub.

Abstract: A series voltage regulator having a regulating transistor (T.sub.1) arranged with its emitter-to-collector path in a series arm of the regulator, the base of which is controlled via a control transistor (T.sub.2) by a first differential amplifier (V) which compares a reference voltage (U.sub.REF) with a voltage proportional to the voltage (U.sub.2) of the regulator output. A differential circuit (V.sub.2) which compares the collector-to-emitter voltage of the regulating transistor (T.sub.1) with an auxiliary voltage (U.sub.3) is provided, the output of which is followed by a current limiting circuit (T.sub.3) which acts upon control transistor (T.sub.2). The auxiliary voltage (U.sub.3) is larger than the collector-to-emitter voltage of the regulating transistor (T.sub.1) which occurs at the beginning of the saturation state of the regulating transistor. The current limiting circuit (T.sub.3) limits the current delivered by the control transistor (T.sub.2) to the base of the regulating transistor (T.sub.

Abstract: The invention relates to a deflectional system of a television set comprising a power transistor and a driving circuit which supplies a deflection current increasing in ramp-shaped manner to a deflection coil. The driving circuit is periodically fed with switching-on pulses of a duration corresponding to the ramp length of the deflecting current. The driving circuit applies an increasing switched-on base current to the power transistor during the switching-on pulse duration, said switched-on base current driving the power transistor into the saturation state during substantially the entire switching-on pulse duration. After termination of the switching-on pulse, the driving circuit controls the power transistor with a switching-off base current which rapidly decreases in relation to the increase of the switched-on base current and finally changes polarity and which effects a rapid return of the power transistor from the saturation state into the blocking state.

Abstract: In a series voltage regulator having a regulating transistor (T) arranged with its emitter-to-collector path in a series arm of the regulator, the base of this regulating transistor being controlled by a differential amplifier (V) which compares a voltage proportional to the regulator output voltage (U.sub.2) with a reference voltage (U.sub.C), this reference voltage is available from a capacitor (C) to which a voltage limiting circuit (B) limiting the reference voltage to a maximum level (U.sub.R) is assigned, and which is connected to the output of a transconductance circuit (G) whose output current (I.sub.A) depends on the difference (U.sub.D) between the output voltage (U.sub.2) and the input voltage (U.sub.1) of the series voltage regulator.