Abstract: A semiconductor die is provided. The semiconductor die includes a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure and a trench extending from a backside of the semiconductor substrate into the semiconductor substrate. A length of the trench is equal or larger than a lateral dimension of the semiconductor substrate.

Abstract: IC devices including transformers that includes two electrically conductive layers are disclosed. An example IC device includes a transformer that includes a first coil, a second coil, and a magnetic core coupled to the two coils. The first coil includes a portion or the whole electrically conductive layers at the backside of a support structure. The second coil includes a portion or the whole electrically conductive layers at either the frontside or the backside of the support structure. The two coils may have a lateral coupling, vertical coupling, or other types of couplings. The transformer is coupled to a semiconductor device over or at least partially in the support structure. The semiconductor device may be at the frontside of the support structure. The transformer can be coupled to the semiconductor device by TSVs. The IC device may also include BPRs that facilitate backside power delivery to the semiconductor device.

Abstract: IC devices including BPRs with integrated decoupling capacitance are disclosed. An example IC device includes a first layer comprising a transistor and a support structure adjoining the first layer. The support structure includes BPRs, which are power rails buried in the support structure, and a decoupling capacitor based on the BPRs. The conductive cores of the BPRs are the electrodes of the decoupling capacitor. The dielectric barriers of the BPRs can be the dielectric of the decupling capacitor. The dielectric of the decupling capacitor may also include a dielectric element between the BPRs. Additionally or alternatively, the IC device includes another decoupling capacitor at the backside of the support structure. The other decoupling capacitor is coupled to the BPRs and can provide additional decoupling capacitance for stabilizing power supply facilitated by the BPRs.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a plurality of transistors arranged at a front side of a semiconductor substrate and a test structure located at the front side of the semiconductor substrate. Further, the semiconductor structure comprises a first electrically conductive connection extending from the test structure through the semiconductor substrate to a backside test pad arranged at a backside of the semiconductor substrate.

Abstract: Signal routing using structures based on buried power rails (BPRs) is described. An example IC device includes a support structure, a plurality of IC components provided over the support structure, and first and second electrically conductive structures having respective portions that are buried in the support structure, such structures referred to as “buried signal rails” (BSRs). The first BSR may be electrically coupled to a terminal of one of the plurality of IC components, the second BSR may be electrically coupled to a terminal of another one of the plurality of IC components, and the IC device may further include a bridge interconnect embedded within the support structure, the bridge interconnect having a first end in contact with the first BSR and a second end in contact with the second BSR. Implementing BSRs in IC devices may allow significantly increasing standard cell library density and provide geometry-free signal routing.

Abstract: A semiconductor device is disclosed, comprising a first semiconductor die comprising a plurality of transistors; a second semiconductor die comprising power supply circuitry configured to generate a supply voltage for the plurality of transistors of the first semiconductor die; and a heat spreader structure. A power supply routing for a reference voltage or a power supply voltage which extends from the heat spreader structure through the second semiconductor die to the first semiconductor die.

Abstract: A semiconductor die is provided. The semiconductor die comprises a plurality of transistors arranged at a front side of a semiconductor substrate and an electrically conductive structure. A top surface of the electrically conductive structure is contacted at the front side of the semiconductor substrate and a bottom surface of the electrically conductive structure is contacted at a backside of the semiconductor substrate. Further, the semiconductor die comprises a backside metallization layer stack attached to the backside of the semiconductor substrate. A first portion of a wiring structure is formed in a first metallization layer of the backside metallization layer stack and a second portion of the wiring structure is formed in a second metallization layer of the backside metallization layer stack.

Abstract: What is described is a process to destroy cells, cellular products, infectious particles and similar pathogens on solid objects as well as in preparations of various components in order to preserve these preparations. For this, the solid objects or preparations are placed or filled into pressure container equipped with a valve, and that the contents of the container are subsequently filled with gas.