Patents by Inventor Joanne Forziati

Joanne Forziati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200220033
    Abstract: A silicon-containing substrate including a top surface which comprises nanostructuring having a plurality of rounded depressions with depths greater than 20 nm.
    Type: Application
    Filed: March 13, 2020
    Publication date: July 9, 2020
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Lauren Magliozzi
  • Patent number: 10629759
    Abstract: In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: April 21, 2020
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Lauren Magliozzi
  • Publication number: 20190221683
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Application
    Filed: March 20, 2019
    Publication date: July 18, 2019
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Patent number: 10269995
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: April 23, 2019
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Publication number: 20180108791
    Abstract: In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
    Type: Application
    Filed: December 11, 2017
    Publication date: April 19, 2018
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Lauren Magliozzi
  • Patent number: 9911878
    Abstract: In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 6, 2018
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Joanne Yim, Jeff Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian Murphy, Lauren Magliozzi
  • Patent number: 9783895
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: October 10, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Adam Standley
  • Publication number: 20170278988
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Application
    Filed: June 14, 2017
    Publication date: September 28, 2017
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Patent number: 9768331
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: September 19, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Michael Jura, Marcie R. Black, Jeffrey B. Miller, Joanne Yim, Joanne Forziati, Brian P. Murphy, Richard Chleboski
  • Patent number: 9601640
    Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: March 21, 2017
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
  • Publication number: 20160319441
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Application
    Filed: July 11, 2016
    Publication date: November 3, 2016
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Adam Standley
  • Patent number: 9449855
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Grant
    Filed: July 13, 2014
    Date of Patent: September 20, 2016
    Assignee: ADVANCED SILICON GROUP, INC.
    Inventors: Joanne Yim, Jeffrey B. Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian P. Murphy, Adam Standley
  • Publication number: 20160268452
    Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.
    Type: Application
    Filed: August 25, 2014
    Publication date: September 15, 2016
    Applicant: Bandgap Engineering, Inc.
    Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
  • Publication number: 20160218229
    Abstract: In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.
    Type: Application
    Filed: August 27, 2014
    Publication date: July 28, 2016
    Inventors: Joanne YIM, Jeff MILLER, Michael JURA, Marcie R. BLACK, Joanne FORZIATI, Brian MURPHY, Lauren MAGLIOZZI
  • Publication number: 20150136212
    Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.
    Type: Application
    Filed: August 25, 2014
    Publication date: May 21, 2015
    Applicant: Bandgap Engineering, Inc.
    Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley
  • Publication number: 20150017802
    Abstract: In an aspect of this disclosure, a method is provided comprising the steps of: (a) providing a silicon-containing substrate, (b) depositing a first metal on the substrate, (c) etching the substrate produced by step (b) using a first etch, and (d) etching the substrate produced by step (c) using a second etch, wherein the second etch is more aggressive towards the deposited metal than the first etch, wherein the result of step (d) comprises silicon nanowires. The method may further comprise, for example, steps (b1) subjecting the first metal to a treatment which causes it to agglomerate and (b2) depositing a second metal.
    Type: Application
    Filed: July 13, 2014
    Publication date: January 15, 2015
    Applicant: Bandgap Engineering, Inc.
    Inventors: Joanne Yim, Jeff Miller, Michael Jura, Marcie R. Black, Joanne Forziati, Brian Murphy, Adam Standley
  • Publication number: 20140332068
    Abstract: A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700C, 750C, 800C, or 850C.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Applicant: BANDGAP ENGINEERING, INC.
    Inventors: Michael Jura, Marcie R. Black, Jeff Miller, Joanne Yim, Joanne Forziati, Brian Murphy, Richard Chleboski
  • Patent number: 8852981
    Abstract: A process is provided for contacting a nanostructured surface. In that process, a substrate is provided having a nanostructured material on a surface, the substrate being conductive and the nanostructured material being coated with an insulating material. A portion of the nanostructured material is at least partially removed. A conductor is deposited on the substrate in such a way that it is in electrical contact with the substrate through the area where the nanostructured material has been at least partially removed.
    Type: Grant
    Filed: September 19, 2012
    Date of Patent: October 7, 2014
    Assignee: Bandgap Engineering, Inc.
    Inventors: Marcie R. Black, Joanne Forziati, Michael Jura, Jeff Miller, Brian Murphy, Adam Standley