Patents by Inventor Joao de Oliveira
Joao de Oliveira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12199026Abstract: An interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly includes a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within the flexible base layer, and at least one first patterned contact layer, provided on any one of the first surface and the second surface of the flexible base layer and which is configured to operably interface with the at least one active electronic circuit component and the at least one 1C component.Type: GrantFiled: January 31, 2020Date of Patent: January 14, 2025Assignee: PRAGMATIC SEMICONDUCTOR LIMITEDInventors: Brian Cobb, Scott White, Ken Williamson, Anthony Sou, Catherine Ramsdale, Rob Mann, Neil Davies, Joao de Oliveira, Gillian Ewers, Pascaline Boulanger, Richard Price
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Patent number: 11982579Abstract: Measurement apparatus, for generating a first output signal indicative of a measurand, comprises: a first oscillator circuit and a second oscillator circuit, each oscillator circuit being arranged to generate a respective oscillating output signal and comprising at least a respective first component having a property determining a respective output frequency of the respective oscillating output signal; a sensor for sensing said measurand, the sensor comprising said first component of the first oscillator circuit, said property of said first component of the first oscillator circuit being dependent upon said measurand; and circuitry arranged to receive said oscillating output signals and generate said first output signal, said first output signal being indicative of a number of cycles of one of the first and second oscillating output signals in a time period determined by a period of the other of said first and second oscillating output signals.Type: GrantFiled: March 5, 2019Date of Patent: May 14, 2024Assignee: PRAGMATIC PRINTING LTD.Inventors: Brian Hardy Cobb, Joao De Oliveira, Thomas Clark, Kenneth David Williamson
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Patent number: 11726061Abstract: A probe element for separation and sensing of analytes of interest controlled by temperature is provided. The probe element includes at least one magnetic crystal and one or more types of capping agents. The capping agent can have stabilizing and or anchoring functions. The magnetic crystal produces a stable magnetic field at the temperature of interest for sensing or separation. The stable magnetic field can be controlled by temperature and the probe can be integrated in a sensing and or separation device and process.Type: GrantFiled: May 24, 2018Date of Patent: August 15, 2023Assignee: UNIVERSIDADE DE AVEIROInventors: Nuno Joao De Oliveira E Silva, Rui Pedro Oliveira Silva
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Patent number: 11575380Abstract: An AND gate comprises: a first input; a second input; an output; and a plurality of field effect transistors, FETs, each having a respective first terminal, a respective second terminal, and a respective gate terminal to which a voltage may be applied to control a conductivity of a respective channel between the respective first terminal and the respective second terminal. The plurality of FETs comprises: a first FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the second input; a second FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the output; and a third FET having its first terminal directly connected to the second input, its second terminal directly connected to the output, and its gate terminal directly connected to the output.Type: GrantFiled: March 24, 2022Date of Patent: February 7, 2023Assignee: PRAGMATIC PRINTING LTD.Inventor: Joao De Oliveira
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Patent number: 11551017Abstract: A RFID (Radio Frequency Identification) system is provided, comprising at least one tag assembly having at least one tag inductance element that is operatively coupled to an integrated circuit (IC). The RFID system further comprises at least one reader assembly having at least one reader inductance element that is configured to operatively and communicatively couple with the tag assembly, and a resonance assembly having at least one first resonance element that is inductively coupleable to the at least one tag inductance element and/or at least one second resonance element that is inductively coupleable to the at least one reader inductance element, and which is adapted to provide coupled magnetic resonance signal transmission between the reader assembly and the tag assembly.Type: GrantFiled: December 3, 2019Date of Patent: January 10, 2023Assignee: PRAGMATIC PRINTING LTD.Inventor: Joao De Oliveira
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Patent number: 11455478Abstract: An RFID tag for capacitively coupled RFID communication with an RFID reader. The RFID tag comprising an integrated circuit (IC), the IC including a first RFID tag electrode arranged to capacitively couple with a first electrode of the RFID reader to form a first capacitor, and a second RFID tag electrode arranged to capacitively couple with a second electrode of the RFID reader to form a second capacitor when the RFID tag is in a first position relative to the RFID reader; power supply circuitry configured to extract power from a first time-varying signal received from the RFID reader via at least one of the first RFID tag electrode and the second RFID tag electrode, and supply the extracted power to circuitry of the RFID tag; and data transmission circuitry configured to receive the extracted power from the power supply circuitry, and transmit data to the RFID reader via at least one of the first RFID tag electrode and the second RFID tag electrode.Type: GrantFiled: August 8, 2019Date of Patent: September 27, 2022Assignee: PRAGMATIC PRINTING LTDInventors: Joao De Oliveira, Brian Cobb, Thomas Clark
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Publication number: 20220216871Abstract: An AND gate comprises: a first input; a second input; an output; and a plurality of field effect transistors, FETs, each having a respective first terminal, a respective second terminal, and a respective gate terminal to which a voltage may be applied to control a conductivity of a respective channel between the respective first terminal and the respective second terminal. The plurality of FETs comprises: a first FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the second input; a second FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the output; and a third FET having its first terminal directly connected to the second input, its second terminal directly connected to the output, and its gate terminal directly connected to the output.Type: ApplicationFiled: March 24, 2022Publication date: July 7, 2022Inventor: Joao DE OLIVEIRA
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Publication number: 20220130738Abstract: The present invention provides for an interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly comprises a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within said flexible base layer, and at least one first patterned contact layer, provided on any one of said first surface and said second surface of said flexible base layer and which is configured to operably interface with said at least one active electronic circuit component and the at least one 1C component.Type: ApplicationFiled: January 31, 2020Publication date: April 28, 2022Inventors: Brian COBB, Scott WHITE, Ken WILLIAMSON, Anthony SOU, Catherine RAMSDALE, Rob MANN, Neil DAVIES, Joao de OLIVEIRA, Gillian EWERS, Pascaline BOULANGER, Richard PRICE
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Patent number: 11316518Abstract: An AND gate comprises: a first input; a second input; an output; and a plurality of field effect transistors, FETs, each having a respective first terminal, a respective second terminal, and a respective gate terminal to which a voltage may be applied to control a conductivity of a respective channel between the respective first terminal and the respective second terminal. The plurality of FETs comprises: a first FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the second input; a second FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the output; and a third FET having its first terminal directly connected to the second input, its second terminal directly connected to the output, and its gate terminal directly connected to the output.Type: GrantFiled: May 16, 2019Date of Patent: April 26, 2022Assignee: PRAGMATIC PRINTING LTD.Inventor: Joao De Oliveira
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Patent number: 11255701Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.Type: GrantFiled: November 19, 2020Date of Patent: February 22, 2022Assignee: PRAGMATIC PRINTING LIMITEDInventor: Joao De Oliveira
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Publication number: 20220036019Abstract: A RFID (Radio Frequency Identification) system is provided, comprising at least one tag assembly having at least one tag inductance element that is operatively coupled to an integrated circuit (IC). The RFID system further comprises at least one reader assembly having at least one reader inductance element that is configured to operatively and communicatively couple with the tag assembly, and a resonance assembly having at least one first resonance element that is inductively coupleable to the at least one tag inductance element and/or at least one second resonance element that is inductively coupleable to the at least one reader inductance element, and which is adapted to provide coupled magnetic resonance signal transmission between the reader assembly and the tag assembly.Type: ApplicationFiled: December 3, 2019Publication date: February 3, 2022Inventor: Joao De Oliveira
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Publication number: 20210382242Abstract: A self-centering structure (300) for aligning optical fibers (308) desired to be optically coupled together is disclosed. The self-centering structure (300) including a body (310) having a first end (312) and a second end (314). The first end (312) defines a first opening (303) and the second end (314) defines a second opening (304). The self-centering structure (300) includes a plurality of groove structures (306) integrally formed in the body (310) of the self-centering structure for receiving the optical fibers (308) and a fiber alignment region (305) positioned at an intermediate location between the first and second ends (312, 314) to facilitate centering and alignment of the optical fibers (308). The plurality of cantilever members (322) is flexible and configured for urging the optical fibers (308) into their respective groove structures (306).Type: ApplicationFiled: June 4, 2021Publication date: December 9, 2021Applicant: CommScope Connectivity Belgium BVBAInventors: Jan WATTÉ, Stefano BERI, Danny Willy August VERHEYDEN, Marcos SAMPAIO, João DE OLIVEIRA CORTEZ, Juergen Albert Jan VAN ERPS, Evert Ludwig Bert EBRAERT, Yu LU
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Publication number: 20210334486Abstract: An RFID tag for capacitively coupled RFID communication with an RFID reader. The RFID tag comprising an integrated circuit (IC), the IC including a first RFID tag electrode arranged to capacitively couple with a first electrode of the RFID reader to form a first capacitor, and a second RFID tag electrode arranged to capacitively couple with a second electrode of the RFID reader to form a second capacitor when the RFID tag is in a first position relative to the RFID reader; power supply circuitry configured to extract power from a first time-varying signal received from the RFID reader via at least one of the first RFID tag electrode and the second RFID tag electrode, and supply the extracted power to circuitry of the RFID tag; and data transmission circuitry configured to receive the extracted power from the power supply circuitry, and transmit data to the RFID reader via at least one of the first RFID tag electrode and the second RFID tag electrode.Type: ApplicationFiled: August 8, 2019Publication date: October 28, 2021Inventors: Joao DE OLIVEIRA, Brian COBB, Thomas CLARK
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Publication number: 20210226629Abstract: An AND gate comprises: a first input; a second input; an output; and a plurality of field effect transistors, FETs, each having a respective first terminal, a respective second terminal, and a respective gate terminal to which a voltage may be applied to control a conductivity of a respective channel between the respective first terminal and the respective second terminal. The plurality of FETs comprises: a first FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the second input; a second FET having its first terminal directly connected to the first input, its second terminal directly connected to the output, and its gate terminal directly connected to the output; and a third FET having its first terminal directly connected to the second input, its second terminal directly connected to the output, and its gate terminal directly connected to the output.Type: ApplicationFiled: May 16, 2019Publication date: July 22, 2021Inventor: Joao DE OLIVEIRA
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Publication number: 20210072047Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the moveable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.Type: ApplicationFiled: November 19, 2020Publication date: March 11, 2021Applicant: PragmatIC Printing LimitedInventor: Joao De Oliveira
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Publication number: 20210003460Abstract: Measurement apparatus, for generating a first output signal indicative of a measurand, comprises: a first oscillator circuit and a second oscillator circuit, each oscillator circuit being arranged to generate a respective oscillating output signal and comprising at least a respective first component having a property determining a respective output frequency of the respective oscillating output signal; a sensor for sensing said measurand, the sensor comprising said first component of the first oscillator circuit, said property of said first component of the first oscillator circuit being dependent upon said measurand; and circuitry arranged to receive said oscillating output signals and generate said first output signal, said first output signal being indicative of a number of cycles of one of the first and second oscillating output signals in a time period determined by a period of the other of said first and second oscillating output signals.Type: ApplicationFiled: March 5, 2019Publication date: January 7, 2021Inventors: Brian Hardy COBB, Joao DE OLIVEIRA, Thomas CLARK, Kenneth David WILLIAMSON
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Patent number: 10871383Abstract: A system is disclosed, comprising a base and at least a first moveable entity, the first moveable entity being moveable with respect to the base and positionable in at least a first position with respect to the base. The base comprises a first base electrode and a second base electrode, and the movable entity comprises a first moveable entity electrode and a second moveable entity electrode. The electrodes are arranged such that when the moveable entity is in the first position the first base electrode and the first moveable entity electrode align to form a first capacitor and the second base electrode and second moveable entity electrode align to form a second capacitor.Type: GrantFiled: December 23, 2019Date of Patent: December 22, 2020Assignee: PRAGMATIC PRINTING LIMITEDInventor: Joao De Oliveira
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Patent number: 10812059Abstract: A comparator is disclosed, for comparing a first input voltage with a second input voltage and generating a corresponding output voltage. The comparator includes a follower stage coupled to a first supply rail and a second supply rail, a follower stage input terminal for the second input voltage, and a follower stage output terminal. The comparator also includes an inverter stage comprising a first inverter stage supply terminal coupled to the first supply rail, a second inverter stage supply terminal coupled to the follower stage output terminal, an inverter stage input terminal for the first input voltage, and an inverter stage output terminal for providing an inverter stage output voltage having a first range. A signal conditioning means is coupled to the inverter stage output terminal and generates a comparator output voltage at a comparator output terminal having a second range larger than the first range.Type: GrantFiled: March 5, 2019Date of Patent: October 20, 2020Assignee: Pragmatic Printing LTDInventor: Joao De Oliveira
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Publication number: 20200232946Abstract: A probe element for separation and sensing of analytes of interest controlled by temperature is provided. The probe element includes at least one magnetic crystal and one or more types of capping agents. The capping agent can have stabilizing and or anchoring functions. The magnetic crystal produces a stable magnetic field at the temperature of interest for sensing or separation. The stable magnetic field can be controlled by temperature and the probe can be integrated in a sensing and or separation device and process.Type: ApplicationFiled: May 24, 2018Publication date: July 23, 2020Inventors: Nuno Joao DE OLIVEIRA E SILVA, Rui Pedro OLIVEIRA SILVA
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Publication number: 20200225425Abstract: A self-centering structure (300) for aligning optical fibers (308) desired to be optically coupled together is disclosed. The self-centering structure (300) including a body (310) having a first end (312) and a second end (314). The first end (312) defines a first opening (303) and the second end (314) defines a second opening (304). The self-centering structure (300) includes a plurality of groove structures (306) integrally formed in the body (310) of the self-centering structure for receiving the optical fibers (308) and a fiber alignment region (305) positioned at an intermediate location between the first and second ends (312, 314) to facilitate centering and alignment of the optical fibers (308). The plurality of cantilever members (322) is flexible and configured for urging the optical fibers (308) into their respective groove structures (306).Type: ApplicationFiled: January 3, 2020Publication date: July 16, 2020Applicant: CommScope Connectivity Belgium BVBAInventors: Jan WATTÉ, Stefano BERI, Danny Willy August VERHEYDEN, Marcos SAMPAIO, João DE OLIVEIRA CORTEZ, Juergen Albert Jan VAN ERPS, Evert Ludwig Bert EBRAERT, Yu LU