Abstract: A digital reception apparatus includes a receiver that performs reception processing on a received signal and an adjuster that adjusts the amplitude of the received signal after the reception processing. A distortion estimator estimates a non-linear distortion of the received signal after the reception processing, the non-linear distortion being caused by the reception processing. A distortion corrector performs a distortion correction on the estimated non-linear distortion. A controller controls the adjuster based on a gain control signal such that the amplitude of a desired signal contained in the received signal after the reception processing and the distortion correction approaches a required level. The distortion estimator estimates the non-linear distortion of the received signal with reference to the gain control signal.

Abstract: Transmitting apparatus 101 performs transmission processing on a general timeslot, while transmitting sub-data using a sub-timeslot for communication quality improvement. When a receiving process is failed on the general timeslot, receiving apparatus 102 receives the sub-timeslot, combines a received result on the sub-timeslot with the received result on the general timeslot to re-decode, and thereby reduces reception errors. Examples used as the sub-data are data deleted by puncture processing in transmission-coding and data of a bit that is known already to obviously have a poor received characteristic in using an M-ary modulation, etc.

Abstract: A digital reception apparatus includes a receiver that processes a received signal and a distortion corrector that corrects a non-linear distortion of the processed received signal, introduced by the receiver. The receiver may include an amplifier, a quadrature demodulator and/or a quantizer. The distortion corrector includes a distortion estimator that estimates the distortion and outputs a correcting signal based on an inverse distortion characteristic of the receiver, and a distortion compensator that multiplies the received signal and the correcting signal to remove the non-linear distortion from the received signal, to obtain a corrected received signal. The corrected signal is output to a demodulator, which performs demodulation processing on the corrected signal, and thereby obtains a demodulated signal.

Abstract: A phase of a sampling clock provided from clock generating circuit 107 is switched periodically and alternately with a phase difference of 180 degrees, and during a period of each phase, timing estimating circuit 105 estimates a symbol timing. High-accuracy timing estimating circuit 109 selects an estimated result with higher reliability among symbol timing estimated results obtained in respective periods, thereby enabling estimation of the symbol timing with time resolution twice a sampling period. It is possible to decrease an operation frequency in an A/D conversion circuit even in a system requiring timing synchronization accuracy with high accuracy.

Abstract: Transmitting apparatus 101 performs transmission processing on a general timeslot, while transmitting sub-data using a sub-timeslot for communication quality improvement. When a receiving process is failed on the general timeslot, receiving apparatus 102 receives the sub-timeslot, combines a received result on the sub-timeslot with the received result on the general timeslot to re-decode, and thereby reduces reception errors. Examples used as the sub-data are data deleted by puncture processing in transmission-coding and data of a bit that is known already to obviously have a poor received characteristic in using an M-ary modulation, etc.

Abstract: A signal transmitted from a transmitting-side apparatus is received, through a propagation path, in receiving section 101 in a digital reception apparatus illustrated in FIG. 1. A signal 150 (received signal) received in receiving section 101 is amplified in amplifying section 102 to be an amplified signal 151. The amplified signal 151 is output to distortion estimating section 103a and distortion compensating section 103b in distortion correcting section 103. Distortion estimating section 103a has information on the distortion characteristic of amplifying section 102 input beforehand thereto. Distortion estimating section 103a estimates a distortion component contained in the amplified signal 151, using the information on the distortion characteristic of amplifying section 102 and the amplified signal 151 from amplifying section 102. Further, using the estimated distortion component, the section 103a generates a correcting signal 152 to correct the distortion component of the amplified signal 151.

Abstract: Convolver 104 calculates convolution integration between symbol number s given by calculation length determination section 118 of a series of known signals sequentially output from known signal storage section 103 and a series of signals corresponding to s symbols selected at symbol intervals from the reception signal series stored in shift register 102 and difference calculation section 105 calculates difference vectors corresponding to 1 symbol of the signal series subjected to convolution integration. Addition section 106 sequentially adds up the calculated difference vectors, calculates addition difference vectors in the same way by shifting the reception signal series 1 sample at a time, memory 107 stores the time of shifting in association with the addition difference vectors and detection section 108 detects parts that satisfy a specific condition from the vectors stored in memory 107.