Patents by Inventor Jochen Schacht

Jochen Schacht has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110280964
    Abstract: A composition for treating hearing loss includes components that function through different biological mechanisms to provide an additive effect that is equal to or greater than a sum of the effect of the individual components. The composition includes a biologically effective amount of at least one scavenger of singlet oxygen, a donor antioxidant, a third antioxidant, and a vasodilator. A method of treating hearing loss includes the step of internally administering the composition including a biologically effective amount of the at least one scavenger of singlet oxygen, the donor antioxidant, the third antioxidant, and the vasodilator to a mammal within three days of trauma to a middle or inner ear of the mammal.
    Type: Application
    Filed: April 21, 2011
    Publication date: November 17, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Josef Miller, Colleen LePrell, Jochen Schacht, Diane Prieskorn
  • Patent number: 7951845
    Abstract: A composition for treating hearing loss includes components that function through different biological mechanisms to provide an additive effect that is equal to or greater than a sum of the effect of the individual components. The composition includes a biologically effective amount of at least one scavenger of singlet oxygen, a donor antioxidant, a third antioxidant, and a vasodilator. A method of treating hearing loss includes the step of internally administering the composition including a biologically effective amount of the at least one scavenger of singlet oxygen, the donor antioxidant, the third antioxidant, and the vasodilator to a mammal within three days of trauma to a middle or inner ear of the mammal.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: May 31, 2011
    Assignee: The Regents of the University of Michigan
    Inventors: Josef Miller, Colleen LePrell, Jochen Schacht, Diane Prieskorn
  • Patent number: 7494915
    Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.
    Type: Grant
    Filed: August 9, 2006
    Date of Patent: February 24, 2009
    Assignees: International Business Machines Corporation, Infineon Technologies, AG
    Inventors: Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor, Erdem Kaltalioglu, Kaushik A. Kumar, Douglas C. La Tulipe, Jr., Jochen Schacht, Andrew H. Simon, Terry A. Spooner, Yun-Yu Wang, Clement H. Wann, Chih-Chao Yang
  • Patent number: 7348279
    Abstract: In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a photoresist layer which is exposed using two masks, with the first mask containing a regular pattern of contact structures with a period which corresponds to the order of magnitude of twice the edge length of the contact hole, and with the second mask containing a pattern with a structure which surrounds at least the contact hole area, and thus covers it.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: March 25, 2008
    Assignee: Infineon Technologies AG
    Inventors: Uwe Paul Schröder, Jochen Schacht
  • Publication number: 20070165870
    Abstract: A composition for treating hearing loss includes components that function through different biological mechanisms to provide an additive effect that is equal to or greater than a sum of the effect of the individual components. The composition includes a biologically effective amount of at least one scavenger of singlet oxygen, a donor antioxidant, a third antioxidant, and a vasodilator. A method of treating hearing loss includes the step of internally administering the composition including a biologically effective amount of the at least one scavenger of singlet oxygen, the donor antioxidant, the third antioxidant, and the vasodilator to a mammal within three days of trauma to a middle or inner ear of the mammal.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 19, 2007
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Josef Miller, Colleen LePrell, Jochen Schacht, Diane Prieskorn
  • Patent number: 7241681
    Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).
    Type: Grant
    Filed: January 12, 2006
    Date of Patent: July 10, 2007
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas C. La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew H. Simon, Mark Hoinkis, Steffen K. Kaldor, Chih-Chao Yang
  • Publication number: 20060292852
    Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.
    Type: Application
    Filed: August 9, 2006
    Publication date: December 28, 2006
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, INFINEON TECHNOLOGIES NORTH AMERICA CORP.
    Inventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Steffen Kaldor, Erdem Kaltalioglu, Kaushik Kumar, Douglas La Tulipe, Jochen Schacht, Andrew Simon, Terry Spooner, Yun-Yu Wang, Clement Wann, Chih-Chao Yang
  • Patent number: 7125792
    Abstract: A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the second dielectric material being different from the first dielectric material. First conductive regions having a first pattern are formed in the first dielectric material, and second conductive regions having a second pattern are formed in the second dielectric material, the second pattern being different from the first pattern. One of the first dielectric material and the second dielectric material comprises an organic material, and the other dielectric material comprises an inorganic material. One of the first and second dielectric materials is etchable selective to the other dielectric material. A method of cleaning a semiconductor wafer processing chamber while a wafer remains residing within the chamber is also disclosed.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: October 24, 2006
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Kaushik Kumar, Douglas C. La Tulipe, Timothy Dalton, Larry Clevenger, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht
  • Patent number: 7122462
    Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: October 17, 2006
    Assignees: International Business Machines Corporation, Infineon Technologies, AG
    Inventors: Lawrence A. Clevenger, Andrew P. Cowley, Timothy J. Dalton, Mark Hoinkis, Steffen K. Kaldor, Erdem Kaltalioglu, Kaushik A. Kumar, Douglas C. La Tulipe, Jr., Jochen Schacht, Andrew H. Simon, Terry A. Spooner, Yun-Yu Wang, Clement H. Wann, Chih-Chao Yang
  • Patent number: 7091612
    Abstract: A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the second dielectric material being different from the first dielectric material. First conductive regions having a first pattern are formed in the first dielectric material, and second conductive regions having a second pattern are formed in the second dielectric material, the second pattern being different from the first pattern. One of the first dielectric material and the second dielectric material comprises an organic material, and the other dielectric material comprises an inorganic material. One of the first and second dielectric materials is etchable selective to the other dielectric material. A method of cleaning a semiconductor wafer processing chamber while a wafer remains residing within the chamber is also disclosed.
    Type: Grant
    Filed: October 14, 2003
    Date of Patent: August 15, 2006
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Kaushik Kumar, Timothy Dalton, Larry Clevenger, Andy Cowley, Douglas C. La Tulipe, Mark Hoinkis, Chih-Chao Yang, Yi-Hsiung Lin, Erdem Kaltalioglu, Markus Naujok, Jochen Schacht
  • Patent number: 7074528
    Abstract: A photomask with desired illumination conditions can be constructed by combining a base pattern of openings with an assist pattern which includes openings that are offset from respectively corresponding openings of the base pattern by a preset angular distance.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: July 11, 2006
    Assignee: Infineon Technologies AG
    Inventors: Jochen Schacht, Uwe Paul Schroeder, Benjamin Szu-Min Lin
  • Publication number: 20060113278
    Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).
    Type: Application
    Filed: January 12, 2006
    Publication date: June 1, 2006
    Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew Simon, Mark Hoinkis, Steffen Kaldor, Chih-Chao Yang
  • Patent number: 7052621
    Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: May 30, 2006
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas C. La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew H. Simon, Mark Hoinkis, Steffen K. Kaldor, Chih-Chao Yang
  • Publication number: 20060110903
    Abstract: In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a photoresist layer which is exposed using two masks, with the first mask containing a regular pattern of contact structures with a period which corresponds to the order of magnitude of twice the edge length of the contact hole, and with the second mask containing a pattern with a structure which surrounds at least the contact hole area, and thus covers it.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 25, 2006
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Uwe Schroder, Jochen Schacht
  • Publication number: 20050136336
    Abstract: A photomask with desired illumination conditions can be constructed by combining a base pattern of openings with an assist pattern which includes openings that are offset from respectively corresponding openings of the base pattern by a preset angular distance.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Jochen Schacht, Uwe Schroeder, Benjamin Lin
  • Publication number: 20050112864
    Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.
    Type: Application
    Filed: November 21, 2003
    Publication date: May 26, 2005
    Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, INFINEON TECHNOLOGIES NORTH AMERICA CORP
    Inventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Steffen Kaldor, Erdem Kaltalioglu, Kaushik Kumar, Douglas La Tulipe, Jr., Jochen Schacht, Andrew Simon, Terry Spooner, Yun-Yu Wang, Clement Wann, Chih-Chao Yang
  • Publication number: 20050079706
    Abstract: A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the second dielectric material being different from the first dielectric material. First conductive regions having a first pattern are formed in the first dielectric material, and second conductive regions having a second pattern are formed in the second dielectric material, the second pattern being different from the first pattern. One of the first dielectric material and the second dielectric material comprises an organic material, and the other dielectric material comprises an inorganic material. One of the first and second dielectric materials is etchable selective to the other dielectric material. A method of cleaning a semiconductor wafer processing chamber while a wafer remains residing within the chamber is also disclosed.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 14, 2005
    Inventors: Kaushik Kumar, Douglas La Tulipe, Timothy Dalton, Larry Clevenger, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht
  • Publication number: 20050077628
    Abstract: A dual damascene structure and method of fabrication thereof. An insulating layer comprises a first dielectric material and a second dielectric material, the second dielectric material being different from the first dielectric material. First conductive regions having a first pattern are formed in the first dielectric material, and second conductive regions having a second pattern are formed in the second dielectric material, the second pattern being different from the first pattern. One of the first dielectric material and the second dielectric material comprises an organic material, and the other dielectric material comprises an inorganic material. One of the first and second dielectric materials is etchable selective to the other dielectric material. A method of cleaning a semiconductor wafer processing chamber while a wafer remains residing within the chamber is also disclosed.
    Type: Application
    Filed: October 14, 2003
    Publication date: April 14, 2005
    Inventors: Kaushik Kumar, Timothy Dalton, Larry Clevenger, Andy Cowley, Douglas La Tulipe, Mark Hoinkis, Chih-Chao Yang, Yi-Hsiung Lin, Erdem Kaltalioglu, Markus Naujok, Jochen Schacht
  • Publication number: 20040251234
    Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).
    Type: Application
    Filed: June 13, 2003
    Publication date: December 16, 2004
    Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas C. La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew H. Simon, Mark Hoinkis, Steffen K. Kaldor, Chih-Chao Yang