Patents by Inventor Jochen Tomaschko

Jochen Tomaschko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840107
    Abstract: A method for forming a cavity in a silicon substrate, a surface of the silicon substrate having a tilting angle relative to a first plane of the silicon substrate, and the first plane being a {111} plane of the silicon substrate, and situation of an etching mask on the surface of the silicon substrate. The etching mask has a retarding structure that protrudes into the mask opening, and a first etching projection region. All further edges of the mask opening outside the first etching projection region are situated essentially parallel to {111} planes of the silicon substrate. The method includes an anisotropic etching of the silicon substrate during a defined etching duration. An etching rate in the <111> directions of the silicon substrate is lower than in other spatial directions, and the first retarding structure is undercut in a first undercut direction going out from the first etching projection region.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: November 17, 2020
    Assignee: Robert Bosch GmbH
    Inventors: Simon Armbruster, Benjamin Steuer, Stefan Pinter, Dietmar Haberer, Jochen Tomaschko
  • Publication number: 20190348300
    Abstract: A method for forming a cavity in a silicon substrate, a surface of the silicon substrate having a tilting angle relative to a first plane of the silicon substrate, and the first plane being a {111} plane of the silicon substrate, and situation of an etching mask on the surface of the silicon substrate. The etching mask has a retarding structure that protrudes into the mask opening, and a first etching projection region. All further edges of the mask opening outside the first etching projection region are situated essentially parallel to {111} planes of the silicon substrate. The method includes an anisotropic etching of the silicon substrate during a defined etching duration. An etching rate in the <111> directions of the silicon substrate is lower than in other spatial directions, and the first retarding structure is undercut in a first undercut direction going out from the first etching projection region.
    Type: Application
    Filed: July 23, 2019
    Publication date: November 14, 2019
    Inventors: Simon Armbruster, Benjamin Steuer, Stefan Pinter, Dietmar Haberer, Jochen Tomaschko
  • Patent number: 10431474
    Abstract: A method for forming a cavity in a silicon substrate, a surface of the silicon substrate having a tilting angle relative to a first plane of the silicon substrate, and the first plane being a {111} plane of the silicon substrate, and situation of an etching mask on the surface of the silicon substrate. The etching mask has a retarding structure that protrudes into the mask opening, and a first etching projection region. All further edges of the mask opening outside the first etching projection region are situated essentially parallel to {111} planes of the silicon substrate. The method includes an anisotropic etching of the silicon substrate during a defined etching duration. An etching rate in the <111> directions of the silicon substrate is lower than in other spatial directions, and the first retarding structure is undercut in a first undercut direction going out from the first etching projection region.
    Type: Grant
    Filed: May 29, 2015
    Date of Patent: October 1, 2019
    Assignee: Robert Bosch GmbH
    Inventors: Simon Armbruster, Benjamin Steuer, Stefan Pinter, Dietmar Haberer, Jochen Tomaschko
  • Patent number: 9663351
    Abstract: A production method for a wafer equipped with transparent plates includes: formation of a row of through-holes in a wafer; formation of at least one strip-shaped recess in a wafer surface, each of the through-holes of the same row intersecting partly with the respectively associated strip-shaped recess; an uninterrupted groove being formed in each intermediate region between two adjacent through-holes of the same row, the floor surface of the groove being oriented so as to be inclined relative to the wafer surface by an angle of inclination greater than 0° and less than 90°; and covering at least one through-hole with at least one transparent plate made of at least one material transparent to at least a sub-spectrum of electromagnetic radiation.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: May 30, 2017
    Assignee: ROBERT BOSCH GMBH
    Inventors: Simon Armbruster, Dietmar Haberer, Stefan Pinter, Jochen Tomaschko, Benjamin Steuer
  • Publication number: 20170140943
    Abstract: A method for forming a cavity in a silicon substrate, a surface of the silicon substrate having a tilting angle relative to a first plane of the silicon substrate, and the first plane being a {111} plane of the silicon substrate, and situation of an etching mask on the surface of the silicon substrate. The etching mask has a retarding structure that protrudes into the mask opening, and a first etching projection region. All further edges of the mask opening outside the first etching projection region are situated essentially parallel to {111} planes of the silicon substrate. The method includes an anisotropic etching of the silicon substrate during a defined etching duration. An etching rate in the <111> directions of the silicon substrate is lower than in other spatial directions, and the first retarding structure is undercut in a first undercut direction going out from the first etching projection region.
    Type: Application
    Filed: May 29, 2015
    Publication date: May 18, 2017
    Inventors: Simon Armbruster, Benjamin Steuer, Stefan Pinter, Dietmar Haberer, Jochen Tomaschko
  • Patent number: 9461234
    Abstract: A manufacturing method is provided for a piezoelectric layer arrangement and a corresponding piezoelectric layer arrangement. The manufacturing method includes the steps: depositing a first electrode layer on a substrate; depositing a first insulating layer on the first electrode layer; forming a through opening in the first insulating layer to expose the first electrode layer within the through opening; depositing a piezoelectric layer on the first insulating layer and on the first electrode layer within the through opening; back-polishing the resulting structure to form a planar surface, on which a piezoelectric layer area, surrounded by the first insulating layer, is exposed; and depositing and structuring a second electrode layer on the first insulating layer, which contacts the piezoelectric layer area.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: October 4, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Thomas Mayer, Juergen Butz, Rainer Straub, Jochen Tomaschko, Christof Single
  • Publication number: 20160035959
    Abstract: A manufacturing method is provided for a piezoelectric layer arrangement and a corresponding piezoelectric layer arrangement. The manufacturing method includes the steps: depositing a first electrode layer on a substrate; depositing a first insulating layer on the first electrode layer; forming a through opening in the first insulating layer to expose the first electrode layer within the through opening; depositing a piezoelectric layer on the first insulating layer and on the first electrode layer within the through opening; back-polishing the resulting structure to form a planar surface, on which a piezoelectric layer area, surrounded by the first insulating layer, is exposed; and depositing and structuring a second electrode layer on the first insulating layer, which contacts the piezoelectric layer area.
    Type: Application
    Filed: July 30, 2015
    Publication date: February 4, 2016
    Inventors: Thomas MAYER, Juergen BUTZ, Rainer STRAUB, Jochen TOMASCHKO, Christof SINGLE
  • Publication number: 20150232328
    Abstract: A production method for a wafer equipped with transparent plates includes: formation of a row of through-holes in a wafer; formation of at least one strip-shaped recess in a wafer surface, each of the through-holes of the same row intersecting partly with the respectively associated strip-shaped recess; an uninterrupted groove being formed in each intermediate region between two adjacent through-holes of the same row, the floor surface of the groove being oriented so as to be inclined relative to the wafer surface by an angle of inclination greater than 0° and less than 90°; and covering at least one through-hole with at least one transparent plate made of at least one material transparent to at least a sub-spectrum of electromagnetic radiation.
    Type: Application
    Filed: January 30, 2015
    Publication date: August 20, 2015
    Inventors: Simon ARMBRUSTER, Dietmar Haberer, Stefan Pinter, Jochen Tomaschko, Benjamin Steuer