Patents by Inventor Jock T. Bovington

Jock T. Bovington has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210247569
    Abstract: Solder reflow compatible connections between optical components are provided by use of reflow compatible epoxies to bond optical components and remain bonded between the optical components at temperatures of at least 260 degrees Celsius for at least five minutes. In some embodiments, the reflow compatible epoxy is index matched to the optical channels in the optical components and is disposed in the light path therebetween. In some embodiments, a light path is defined between the optical channels through at least a portion of an air gap between the optical components.
    Type: Application
    Filed: February 11, 2020
    Publication date: August 12, 2021
    Inventors: Matthew J. TRAVERSO, Jock T. BOVINGTON, Ashley J.M. ERICKSON
  • Patent number: 11081856
    Abstract: A laser integrated photonic platform to allow for independent fabrication and development of laser systems in silicon photonics. The photonic platform includes a silicon substrate with an upper surface, one or more through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate. The photonic platform includes a silicon substrate wafer with through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate for mating the photonic platform to a photonics integrated circuit. The photonic platform also includes a III-V semiconductor material structure wafer, where the III-V wafer is bonded to the upper surface of the silicon substrate and includes at least one active layer forming a light source for the photonic platform.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: August 3, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Jock T. Bovington, Vipulkumar K. Patel, Dominic F. Siriani
  • Publication number: 20210223487
    Abstract: A fiber array unit (FAU) includes a substrate, a plurality of optical fibers, and a lid. The substrate includes: an optical window extending through a layer of non-transparent material, a plurality of grooves, and an alignment protrusion configured to mate with an alignment receiver. The plurality of optical fibers are disposed in the plurality of grooves. The alignment protrusion is configured to align the plurality of optical fibers with an external device when mated with the alignment receiver. The plurality of optical fibers is disposed between the lid and the substrate.
    Type: Application
    Filed: April 1, 2021
    Publication date: July 22, 2021
    Inventors: Vipulkumar PATEL, Kumar Satya Harinadh POTLURI, Jock T. BOVINGTON, Ashley J. MAKER
  • Patent number: 11042049
    Abstract: Thermal isolation elements are provided in wafer-bonded silicon photonics that include a photonic platform, including a heating element and an optical waveguide that are disposed between a first surface and a second surface (opposite to the first surface) of the photonic platform; a substrate, including a third surface and a fourth surface (opposite to the third surface); wherein the first surface of the photonic platform is bonded to the third surface of the substrate; and wherein a cavity is defined by a trench in one or more of: the first surface and extending towards, but not reaching, the second surface, and the third surface and extending towards, but not reaching, the fourth surface; wherein the cavity is filled with a gas of a known composition at a predefined pressure; and wherein the cavity is aligned with the optical waveguide and the heating element.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: June 22, 2021
    Assignee: Cisco Technology, Inc.
    Inventor: Jock T. Bovington
  • Patent number: 11018473
    Abstract: Embodiments provide for selective-area growth of III-V materials for integration with silicon photonics. The resulting platform includes a substrate; an insulator, extending a first distance from the substrate, including a passive optical component at a second distance from the substrate less than the first distance, and defining a pit extending to the substrate; and a III-V component, extending from the substrate within in the pit defined in the insulator, the III-V component including a gain medium included at the second distance from the substrate and optically coupled with the passive optical component. The pit may define an Optical Coupling Interface between the III-V component and the passive optical component, or a slit defined between the III-V component and the passive optical component may define the Optical Coupling Interface.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: May 25, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Dominic F. Siriani, Jock T. Bovington, Vipulkumar K. Patel
  • Patent number: 10996405
    Abstract: Embodiments herein describe a fiber array unit (FAU) configured to optically couple a photonic chip with a plurality of optical fibers. Epoxy can be used to bond the FAU to the photonic chip. However, curing the epoxy between the FAU and the photonic chip is difficult. As such, the FAU can include one or more optical windows etched into or completely through a non-transparent layer that overlap the epoxy disposed on the photonic chip. UV radiation can be emitted through the optical windows to cure the underlying epoxy. In one example, the windows can also be used for dispensing epoxy. In addition to the optical windows, the FAU can include alignment protrusions (e.g., frustums) which mate or interlock with respective alignment receivers in the photonic chip. Doing so may facilitate passive alignment of the optical fibers in the FAU to an optical interface in the photonic chip.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: May 4, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar Patel, Kumar Satya Harinadh Potluri, Jock T. Bovington, Ashley J. Maker
  • Publication number: 20210109382
    Abstract: Thermal isolation elements are provided in wafer-bonded silicon photonics that include a photonic platform, including a heating element and an optical waveguide that are disposed between a first surface and a second surface (opposite to the first surface) of the photonic platform; a substrate, including a third surface and a fourth surface (opposite to the third surface); wherein the first surface of the photonic platform is bonded to the third surface of the substrate; and wherein a cavity is defined by a trench in one or more of: the first surface and extending towards, but not reaching, the second surface, and the third surface and extending towards, but not reaching, the fourth surface; wherein the cavity is filled with a gas of a known composition at a predefined pressure; and wherein the cavity is aligned with the optical waveguide and the heating element.
    Type: Application
    Filed: October 9, 2019
    Publication date: April 15, 2021
    Inventor: Jock T. BOVINGTON
  • Patent number: 10962719
    Abstract: Using laser patterning for an optical assembly, optical features are written into photonic elements at the end of a manufacturing sequence in order to prevent errors and damages to the optical features. The optical assembly is manufactured by affixing a photonic element to a substrate which includes one or more optical features and mapping one or more optical features for the photonic element. The optical features are then written into the fixed photonic element using laser patterning and the optical assembly is completed by connecting components, such as optical fibers, to the photonic element.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: March 30, 2021
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Ashley J. Maker, Jock T. Bovington, Matthew J. Traverso
  • Publication number: 20210091529
    Abstract: Described herein is a two chip photonic device (e.g., a hybrid master oscillator power amplifier (MOPA)) where a gain region and optical amplifier region are formed on a III-V chip and a variable reflector (which in combination with the gain region forms a laser cavity) is formed on a different semiconductor chip that includes silicon, silicon nitride, lithium niobate, or the like. Sides of the two chips are disposed in a facing relationship so that optical signals can transfer between the gain region, the variable reflector, and the optical amplifier.
    Type: Application
    Filed: September 25, 2019
    Publication date: March 25, 2021
    Inventors: Dominic F. SIRIANI, Vipulkumar K. PATEL, Jock T. BOVINGTON, Matthew J. TRAVERSO
  • Publication number: 20200393622
    Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.
    Type: Application
    Filed: July 8, 2020
    Publication date: December 17, 2020
    Inventors: Vipulkumar PATEL, Matthew J. TRAVERSO, Ashley J. MAKER, Jock T. BOVINGTON
  • Patent number: 10782475
    Abstract: Embodiments provide for a photonic platform, comprising: a silicon component; a III-V component; and a bonding layer contacting the silicon component on one side and the III-V component on the opposite side; wherein the silicon component comprises: a silicon substrate; a dielectric, contacting the silicon substrate on one face and the bonding layer on the opposite face; a silicon cores disposed in the dielectric; and wherein the III-V component comprises: a III-V cladding; a III-V contact, having a first side that contacts the bonding layer; and an active region, disposed on the III-V contact and separating the III-V contact from the III-V cladding, wherein the active region is located relative to the silicon cores to define an optical path that includes the active region and the silicon cores.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: September 22, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Jock T. Bovington, Kenneth J. Thomson, Dominic F. Siriani
  • Patent number: 10746934
    Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: August 18, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar Patel, Matthew J. Traverso, Ashley J. Maker, Jock T. Bovington
  • Publication number: 20200241207
    Abstract: Using laser patterning for an optical assembly, optical features are written into photonic elements at the end of a manufacturing sequence in order to prevent errors and damages to the optical features. The optical assembly is manufactured by affixing a photonic element to a substrate which includes one or more optical features and mapping one or more optical features for the photonic element. The optical features are then written into the fixed photonic element using laser patterning and the optical assembly is completed by connecting components, such as optical fibers, to the photonic element.
    Type: Application
    Filed: January 29, 2019
    Publication date: July 30, 2020
    Inventors: Sandeep RAZDAN, Ashley J. MAKER, Jock T. BOVINGTON, Matthew J. TRAVERSO
  • Patent number: 10725240
    Abstract: A method comprises receiving, at a plurality of optical distributors of a photonic chip, optical energy from a plurality of primary laser sources. Each of the optical distributors receives optical energy from a respective primary laser source at a respective first input. The method further comprises detecting a failed primary laser source of the primary laser sources using control circuitry of a sparing system. The sparing system further comprises one or more secondary laser sources configured to provide optical energy to respective second inputs of the optical distributors. A first one of the secondary laser sources is optically coupled with at least two of the optical distributors. The method further comprises controlling, using the control circuitry, a first one of the secondary laser sources to selectively provide optical energy to the optical distributor whose first input is optically coupled with the failed primary laser source.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: July 28, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Jock T. Bovington, Matthew J. Traverso
  • Publication number: 20200220329
    Abstract: An optical apparatus comprises a semiconductor substrate and a slab-coupled optical waveguide (SCOW) emitter disposed on the semiconductor substrate. The SCOW emitter comprises an optical waveguide comprising: a first region doped with a first conductivity type; a second region doped with a different, second conductivity type; and an optically active region disposed between the first region and the second region. The optically active region comprises a plurality of quantum dots.
    Type: Application
    Filed: January 8, 2019
    Publication date: July 9, 2020
    Inventors: Dominic F. SIRIANI, Jock T. BOVINGTON, Matthew J. TRAVERSO
  • Publication number: 20200212649
    Abstract: A laser integrated photonic platform to allow for independent fabrication and development of laser systems in silicon photonics. The photonic platform includes a silicon substrate with an upper surface, one or more through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate. The photonic platform includes a silicon substrate wafer with through silicon vias (TSVs) defined through the silicon substrate, and passive alignment features in the substrate for mating the photonic platform to a photonics integrated circuit. The photonic platform also includes a III-V semiconductor material structure wafer, where the III-V wafer is bonded to the upper surface of the silicon substrate and includes at least one active layer forming a light source for the photonic platform.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 2, 2020
    Inventors: Jock T. BOVINGTON, Vipulkumar K. PATEL, Dominic F. SIRIANI
  • Publication number: 20200127438
    Abstract: The present disclosure provides for laser integration into photonic platforms in which a first wafer, including a first substrate and a first insulator that includes a first plurality of dies that each include a first set of optical waveguides, is bonded to a second wafer, including a second substrate and a second insulator that includes a second plurality of dies that each include a second set of optical waveguides. The bond between the two wafers defines a wafer bond interface joining the first insulator with the second insulator and vertically aligning the first plurality of dies with the second plurality of dies such that respective first sets of optical waveguides are optically coupled with respective second sets of optical waveguides.
    Type: Application
    Filed: March 26, 2019
    Publication date: April 23, 2020
    Inventors: Jock T. BOVINGTON, Kenneth J. THOMSON, Dominic F. SIRIANI
  • Publication number: 20200124794
    Abstract: Embodiments provide for a photonic platform, comprising: a silicon component; a III-V component; and a bonding layer contacting the silicon component on one side and the III-V component on the opposite side; wherein the silicon component comprises: a silicon substrate; a dielectric, contacting the silicon substrate on one face and the bonding layer on the opposite face; a silicon cores disposed in the dielectric; and wherein the III-V component comprises: a III-V cladding; a III-V contact, having a first side that contacts the bonding layer; and an active region, disposed on the III-V contact and separating the III-V contact from the III-V cladding, wherein the active region is located relative to the silicon cores to define an optical path that includes the active region and the silicon cores.
    Type: Application
    Filed: June 6, 2019
    Publication date: April 23, 2020
    Inventors: Jock T. BOVINGTON, Kenneth J. THOMSON, Dominic F. SIRIANI
  • Publication number: 20200088940
    Abstract: A method comprises receiving, at a plurality of optical distributors of a photonic chip, optical energy from a plurality of primary laser sources. Each of the optical distributors receives optical energy from a respective primary laser source at a respective first input. The method further comprises detecting a failed primary laser source of the primary laser sources using control circuitry of a sparing system. The sparing system further comprises one or more secondary laser sources configured to provide optical energy to respective second inputs of the optical distributors. A first one of the secondary laser sources is optically coupled with at least two of the optical distributors. The method further comprises controlling, using the control circuitry, a first one of the secondary laser sources to selectively provide optical energy to the optical distributor whose first input is optically coupled with the failed primary laser source.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 19, 2020
    Inventors: Jock T. BOVINGTON, Matthew J. TRAVERSO
  • Patent number: 10564352
    Abstract: Aspects described herein include a method comprising forming an insulator layer above a silicon layer of a silicon-on-insulator (SOI) substrate. A first optical device is formed partly in the silicon layer and partly in the insulator layer. A first optical waveguide is formed in the insulator layer and optically coupled with the first optical device. The method further comprises forming conductive contacts extending partly through the insulator layer to the first optical device, bonding a first surface of an interposer with a top surface of the insulator layer, and forming, from a second surface of the interposer opposite the first surface, a plurality of first conductive vias extending at least partly through the interposer. The plurality of first conductive vias are coupled with the conductive contacts.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: February 18, 2020
    Assignee: Cisco Technology, Inc.
    Inventors: Sandeep Razdan, Ashley J. Maker, Matthew J. Traverso, Mark A. Webster, Jock T. Bovington