Abstract: A technique for assigning addresses to modular units connected to a computer system expansion bus. A unique address is initially generated in a controller module attached to the expansion bus and is transferred to the first one of several serially coupled expansion modules. The first modules receives the unique address which now identifies that module and generates a new unique address from the received unique address. The new unique address is transferred to the next expansion module which uses the received address to identify itself. The steps are repeated until each expansion module has received a unique address to identify itself. In each module, a Read Only Memory (ROM) is used to receive the unique address from the previous module and to generate a new address for the next module.

Abstract: Apparatus for transferring data from the memory associated with one processor to the memory associated with another processor. A direct memory access (DMA) controller is connected to each processor and facilitates transfer of bulk data from one memory to the other without the intervention of either or both processors.