Patents by Inventor Jody B. Joyner

Jody B. Joyner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6343344
    Abstract: In response to receiving a combined address for related data access and cast out operations, including an index identifying a congruence class containing both the target of the data access and the victim of the cast out, a single directory access is performed utilizing the index to locate the congruence class. Address tags within the congruence class are then compared to the address tag for the data access operation and the address tag for the cast out operation concurrently, generating separate hit signals as appropriate. Only a single directory access is required, however, rather than two separate directory accesses as required in the known art, taking advantage of the fact that both the data access target and the cast out victim belong to a single congruence class. Response latency is also improved, as is address bus bandwidth utilization.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: January 29, 2002
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis
  • Patent number: 6338124
    Abstract: Combined response logic for a bus receives a combined data access and cast out/deallocate operation initiating by a storage device within a specific level of a storage hierarchy, with a coherency state and LRU position of the cast out/deallocate victim appended. Snoopers on the bus drive snoop responses to the combined operation with the coherency state and/or LRU position of locally-stored cache lines corresponding to the victim appended. The combined response logic determines, from the coherency state and LRU position information appended to the combined operation and the snoop responses, whether an update of the LRU position and/or coherency state of a cache line corresponding to the victim within one of the snoopers is required. If so, the combined response logic selects a snooper storage device to have at least the LRU position of a respective cache line corresponding to the victim updated, and appends an update command identifying the selected snooper to the combined response.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: January 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis
  • Patent number: 6324617
    Abstract: A combined address bus transaction contains the address tag for a data access operation target, the address tag for a victim to be replaced, and the address index field identifying the congruence class including both the target and the victim. Directory state information such as coherency state and/or LRU position for the cast out victim may also be appended to the index field and target and victim address tags within the bus operation. Address bus bandwidth utilization is thereby improved, eliminating duplicate transmission of the index field employed by separate data access and cast out operations in accordance with the existing practice. The victim may be prospectively selected concurrently with the determination of whether the target may be found within the storage device forming the combined address, improving overall performance for that device.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: November 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis
  • Patent number: 6321305
    Abstract: In cancelling the cast out portion of a combined operation including a data access related to the cast out, the combined response logic explicitly directs the storage device initiating the combined operation not to allocate storage for the target of the data access. Instead, the target of the data access may be passed directly to an in-line processor core without storage, may be stored in a horizontal storage device, or may be stored in an in-line, noninclusive, lower level storage device. Cancellation of the cast out thus defers any latency associated with writing the cast out victim to system memory while maximizing utilization of available storage with acceptable tradeoffs in data access latency.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis
  • Patent number: 6279086
    Abstract: Upon snooping a combined data access and cast out/deallocate operation initiating by a horizontal storage device, snoop logic determines, from LRU position information appended to the combined response to the combined operation, whether the coherency state and/or LRU position of the victim may be upgraded within the subject storage device. If so, the coherency state or LRU position is upgraded to improve global data storage management. For instance, a cache line within a snooping storage device may be altered to assume the coherency state of the victim within the storage device initiating the combined operation to improve data storage management under a given replacement policy.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: August 21, 2001
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis
  • Patent number: 6275909
    Abstract: Combined response logic for a bus receives a combined data access and cast out/deallocate operation initiating by a storage device within a specific level of a storage hierarchy with a coherency state of the cast out/deallocate victim appended. Snoopers on the bus drive snoop responses to the combined operation with the coherency state and/or LRU position of locally-stored cache lines corresponding to the victim appended. The combined response logic determines, from the coherency state information appended to the combined operation and the snoop responses, whether a coherency upgrade is possible. If so, the combined response logic selects a snooper storage device to upgrade the coherency state of a respective cache line corresponding to the victim, and appends an upgrade directive to the combined response.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Ravi Kumar Arimilli, John Steven Dodson, Guy Lynn Guthrie, Jody B. Joyner, Jerry Don Lewis