Patents by Inventor Joe A. Ward

Joe A. Ward has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8373249
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: February 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Publication number: 20110117716
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Application
    Filed: January 24, 2011
    Publication date: May 19, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Patent number: 7879649
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: February 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Publication number: 20100009511
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 14, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Patent number: 7602039
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: October 13, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Publication number: 20040041245
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 4, 2004
    Applicant: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward