Patents by Inventor Joe Eddie Leyba, II

Joe Eddie Leyba, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8536895
    Abstract: An embodiment of an integrated circuit (IC) is described. This embodiment of the IC includes an interposer; a first die on an interposer, where the first die generates a global signal propagated through the interposer; and a second die on the surface of the interposer and coupled to the global signal. The first die and the second die each is configured to implement a same operating state concurrently in response to the global signal.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: September 17, 2013
    Assignee: Xilinx, Inc.
    Inventors: Weiguang Lu, Eric E. Edwards, Paul-Hugo Lamarche, Steven P. Young, Brian C. Gaide, Joe Eddie Leyba, II
  • Publication number: 20120019292
    Abstract: An embodiment of an integrated circuit (IC) is described. This embodiment of the IC includes an interposer; a first die on an interposer, where the first die generates a global signal propagated through the interposer; and a second die on the surface of the interposer and coupled to the global signal. The first die and the second die each is configured to implement a same operating state concurrently in response to the global signal.
    Type: Application
    Filed: September 30, 2011
    Publication date: January 26, 2012
    Applicant: XILINX, INC.
    Inventors: Weiguang Lu, Eric E. Edwards, Paul-Hugo Lamarche, Steven P. Young, Brian C. Gaide, Joe Eddie Leyba, II
  • Patent number: 8058897
    Abstract: A method of configuring an integrated circuit (IC) can include receiving configuration data within a master die of the IC. The IC can include the master die and a slave die. A master segment and a slave segment of the configuration data can be determined. The slave segment of the configuration data can be distributed to the slave die of the IC.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: November 15, 2011
    Assignee: Xilinx, Inc.
    Inventors: Weiguang Lu, Eric E. Edwards, Paul-Hugo Lamarche, Steven P. Young, Brian C. Gaide, Joe Eddie Leyba, II
  • Patent number: 7831415
    Abstract: A method of testing input signals coupled to a circuit for performing a predetermined function is disclosed. The method comprises coupling input signals to inputs of the circuit by way of programmable interconnects; controlling the paths of the input signals within the circuit from the inputs to an output of the circuit; maintaining the states of the input signals coupled to the inputs of the circuit and routed to the output of the circuit; and testing output signals of the circuit to determine whether the correct input signals were provided to the inputs of the circuit by way of the programmable interconnects. A device having programmable logic which enables testing of input signals is also disclosed.
    Type: Grant
    Filed: February 21, 2008
    Date of Patent: November 9, 2010
    Assignee: Xilinx, Inc.
    Inventors: Joe Eddie Leyba, II, Wayne E. Wennekamp, Schuyler E. Shimanek