Patents by Inventor Joe Karniewicz

Joe Karniewicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5739058
    Abstract: A semiconductor fabrication method is provided for forming transistors upon a semiconductor substrate wherein the semiconductor substrate has first, second and third substrate regions. A single mask layer is formed over the semiconductor substrate. The single mask layer has a first mask portion covering the first substrate region, a second mask portion exposing the second substrate region, and a third mask portion partially covering the third substrate region. A first type impurity dopant is differentially introduced into the first, second and third substrate regions according to the single mask layer. First, second and third transistors are formed in the first, second and third substrate regions, respectively. The first and second transistors have differing conductivity types and the first and third transistors have the same conductivity type. The first and third transistors also have differing threshold voltages according to the differential introducing of the dopant.
    Type: Grant
    Filed: December 14, 1995
    Date of Patent: April 14, 1998
    Assignee: Micron Technology, Inc.
    Inventors: Joe Karniewicz, Zhiqiang (Jefferey) Wu, Chandramouli Venkataramani, David Kao, Mohamed Imam, Sittampalam Yoganathan