Abstract: Output signals of two adjacent data signal lines DA1 to DAn and DB1 to DBn are supplied to comparators CMP1 to CMPn, respectively. When pixels are inspected, different signal potentials are input to signal input terminals 14a and 14b. Signals are written to pixels from the first row to the last row. Thereafter, a pre-charging process is performed by supplying a voltage to the terminals 14a and 14b. Thereafter, signals are read from all the pixels from the first row to the last row. The signal potentials that have been read are compared by the comparators CMP1 to CMPn. Depending on the relations of voltages written as digitally-compared outputs of the comparators CMP1 to CMPn, defective pixels are detected.

Abstract: Output signals of two adjacent data signal lines DA1 to DAn and DB1 to DBn are supplied to comparators CMP1 to CMPn, respectively. When pixels are inspected, different signal potentials are input to signal input terminals 14a and 14b. Signals are written to pixels from the first row to the last row. Thereafter, a pre-charging process is performed by supplying a voltage to the terminals 14a and 14b. Thereafter, signals are read from all the pixels from the first row to the last row. The signal potentials that have been read are compared by the comparators CMP1 to CMPn. Depending on relations of voltages written as digitally compared outputs of the comparators CMP1 to CMPn, defective pixels are detected.