Patents by Inventor Joel A. Gerber

Joel A. Gerber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070102827
    Abstract: The present invention relates to a method for connecting an integrated circuit chip to a circuit substrate. The method includes the step of pre-applying adhesive directly to a bumped side of an integrated circuit chip. The method also includes the steps of removing portions of the adhesive from the tips of the solder bumps to expose a contact surface, and pressing the bumped side of the integrated circuit chip, which has previously been coated with adhesive, against the circuit substrate such that the bumps provide an electrical connection between the integrated circuit chip and the circuit substrate. The adhesive is removed from the tips of the solder bumps using a solvent assisted wiping action. The pre-applied adhesive on the chip forms a bond between the integrated circuit chip and the circuit substrate.
    Type: Application
    Filed: January 8, 2007
    Publication date: May 10, 2007
    Inventors: Peter Hogerton, Kevin Chen, Joel Gerber, Robert Zenner
  • Patent number: 7170185
    Abstract: The present invention relates to a method for connecting an integrated circuit chip to a circuit substrate. The method includes the step of pre-applying adhesive directly to a bumped side of an integrated circuit chip. The method also includes the steps of removing portions of the adhesive from the tips of the solder bumps to expose a contact surface, and pressing the bumped side of the integrated circuit chip, which has previously been coated with adhesive, against the circuit substrate such that the bumps provide an electrical connection between the integrated circuit chip and the circuit substrate. The adhesive is removed from the tips of the solder bumps using a solvent assisted wiping action. The pre-applied adhesive on the chip forms a bond between the integrated circuit chip and the circuit substrate.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: January 30, 2007
    Assignee: 3M Innovative Properties Company
    Inventors: Peter B. Hogerton, Kevin Yu Chen, Joel A. Gerber, Robert L. D. Zenner
  • Patent number: 6791036
    Abstract: Methods for producing circuit elements the resultant circuit elements, and methods for making circuits therefrom are disclosed. A precursor circuit element includes a first insulating layer with conductor thereon and an electrically conducting member or bump, protruding from the conductor, that provide a shape to one surface of the precursor circuit element. A second insulating layer, including an adhesive, is placed onto the precursor circuit element and assumes the shape of the aforementioned surface of the precursor circuit element.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: September 14, 2004
    Assignee: 3M Innovative Properties Company
    Inventors: Yu Chen, Joel A. Gerber, Brian E. Schreiber, Joshua W. Smith
  • Patent number: 6260264
    Abstract: The present invention relates to a method for connecting an integrated circuit chip to a circuit substrate. The method includes the step of the steps pre-applying adhesive directly to a bumped side of integrated circuit chip. The method also includes the step of pressing the bumped side of the integrated circuit chip, which has previously been coated with adhesive, against the circuit substrate such that the bumps provide an electrical connection between the integrated circuit chip and the circuit substrate. The pre-applied adhesive on the chip forms a bond between the integrated circuit chip and the circuit substrate.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: July 17, 2001
    Assignee: 3M Innovative Properties Company
    Inventors: Yu Chen, Joel A. Gerber, Peter B. Hogerton
  • Patent number: 6063647
    Abstract: Methods for producing circuit elements the resultant circuit elements, and methods for making circuits therefrom are disclosed. A precursor circuit element includes a first insulating layer with conductor thereon and an electrically conducting member or bump, protruding from the conductor, that provide a shape to one surface of the precursor circuit element. A second insulating layer, including an adhesive, is placed onto the precursor circuit element and assumes the shape of the aforementioned surface of the precursor circuit element.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: May 16, 2000
    Assignee: 3M Innovative Properties Company
    Inventors: Yu Chen, Joel A. Gerber, Brian E. Schreiber, Joshua W. Smith
  • Patent number: 5685939
    Abstract: A Z-axis adhesive is produced by dispersing electrically-conductive particles in an organic binder and then imagewise exposing the material to electromagnetic radiation, preferably from a laser or a flash lamp, under conditions sufficient to transfer the particles from the binder to a receptor in a patterned fashion such that the resulting adhesive is a Z-axis conductor in the patterned areas. The patterned adhesive can then be used to establish electrical interconnection between facing electrodes of a number of different structures including semiconductor chips and a flexible printed circuit board.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: November 11, 1997
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Martin B. Wolk, Thomas A. Isberg, Michael A. Kropp, William V. Dower, Joel A. Gerber
  • Patent number: 5601678
    Abstract: A method of forming a multi-layer circuit board which includes electrical interconnections between adjacent circuit board layers of the multi-layer board. A via hole is provided through a circuit board layer. The via hole is filled with a via metal. The via metal is plated with a low melting point metal. An adhesive film is deposited over the circuit board layer. Adjacent layers of the multi-layer circuit board are stacked and aligned together. The layers are laminated under heat and pressure. The low melting point metal provides an electrical interconnection between adjacent layers.
    Type: Grant
    Filed: January 23, 1995
    Date of Patent: February 11, 1997
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Joel A. Gerber, Peter A. Gits
  • Patent number: 5401913
    Abstract: A multi-layer circuit board includes electrical interconnections between adjacent circuit board layers of the multi-layer board. A via hole is provided through a circuit board layer. The via hole is filled with a via metal. The via metal is plated with a low melting point metal. An adhesive film is deposited over the circuit board layer. Adjacent layers of the multi-layer circuit board are stacked and aligned together. The layers are laminated under heat and pressure. The low melting point metal provides an electrical interconnection between adjacent layers.
    Type: Grant
    Filed: June 8, 1993
    Date of Patent: March 28, 1995
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Joel A. Gerber, Peter A. Gits
  • Patent number: 4700253
    Abstract: A magnetic pole head for recording and playback is described. Its features, as illustrated in FIG. 1 are: a high permeability core 1, a magnetic field producing means 3, and an acute angle .phi. between the bottom surface and side surface at the trailing portion of the head (i.e. the portion which influences the recording medium 5 last). It has been found that this improved pole head significantly increases the derivative of vertical magnetic field intensity with respect to lateral distance. This increase in the rate at which vertical field intensity changes will allow for higher density perpendicular recording than is feasible with conventional vertical heads.
    Type: Grant
    Filed: November 22, 1983
    Date of Patent: October 13, 1987
    Assignee: Minnesota Mining and Manufacturing Company
    Inventors: Joel A. Gerber, Jerry A. Sievers
  • Patent number: 4108733
    Abstract: A coke oven regenerator checker brick which incorporates, with the principle of maximization of heat transfer, the ability to minimize pressure differential within such a regenerator, while providing facility of inexpensive manufacturing techniques. A coke oven checker of standard overall dimension incorporates wave-like corrugations, for maximum surface area exposure, and sufficient web thickness to enable manufacture by the conventional re-press method which is the most economical commercially available method for manufacturing refractory coke oven checker brick.
    Type: Grant
    Filed: April 25, 1977
    Date of Patent: August 22, 1978
    Assignee: Koppers Company, Inc.
    Inventor: Donald Joel Gerber