Patents by Inventor Joel Caranana

Joel Caranana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bus control circuit
    Patent number: 6798235
    Abstract: A bus interface having a first circuit based on a first pair of transistors of opposite types having a control electrode and a common electrode for providing a first output potential. A second circuit has a second pair of transistors of opposite types and having a common electrode for providing a second potential switching in opposite direction from the former. This device has a first capacitive coupling means for feeding a portion of the signal existing at said first potential back into said control electrode of said second transistor pair and second capacitive coupling means for feeding a portion of the signal existing at said second potential back into said control electrodes of said first transistor pair. Thus variations between the rise and decay times of the transistors of each pair can be compensated for.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: September 28, 2004
    Assignee: STMicroelectronics S.A.
    Inventor: Joel Caranana
  • Bus control circuit
    Publication number: 20030080789
    Abstract: A bus interface having a first circuit based on a first pair of transistors of opposite types having a control electrode and a common electrode for providing a first output potential. A second circuit has a second pair of transistors of opposite types and having a common electrode for providing a second potential switching in opposite direction from the former. This device has a first capacitive coupling means for feeding a portion of the signal existing at said first potential back into said control electrode of said second transistor pair and second capacitive coupling means for feeding a portion of the signal existing at said second potential back into said control electrodes of said first transistor pair. Thus variations between the rise and decay times of the transistors of each pair can be compensated for.
    Type: Application
    Filed: September 6, 2002
    Publication date: May 1, 2003
    Applicant: ST Microelectronics S.A.
    Inventor: Joel Caranana