Patents by Inventor Joel D. Feldman

Joel D. Feldman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7401234
    Abstract: Methods and apparatus are provided for an electronic device having an autonomous memory checker for runtime security assurance. The autonomous memory checker comprises a controller, a memory reference file coupled to the controller, and an authentication engine coupled to the controller. A check is performed during runtime operation of the electronic device. The autonomous memory checker generates runtime reference values corresponding to trusted information stored in memory. The runtime reference values are compared against memory reference values stored in the memory reference file. The memory reference values are generated from the trusted information stored in memory. An error signal is generated when the runtime reference values are not identical to the memory reference values thereby indicating that the trusted information has been modified.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: July 15, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Lawrence L. Case, Mark D. Redman, Thomas E. Tkacik, Joel D. Feldman
  • Patent number: 7043017
    Abstract: A symmetric key stream processor 60 that encrypts and decrypts text in accordance with the RC4 algorithm has a main processing block 62 and a host interface 64. The main processing block 62 includes an Sbox memory 78 implemented with a synchronous dual-port RAM and an encryption logic block 80 with a finite state machine. The dual port memory architecture is used for efficiency during permutation and message processing.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: May 9, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Richard J. Swindlehurst, Joel D. Feldman
  • Publication number: 20030091185
    Abstract: A symmetric key stream processor 60 that encrypts and decrypts text in accordance with the RC4 algorithm has a main processing block 62 and a host interface 64. The main processing block 62 includes an Sbox memory 78 implemented with a synchronous dual-port RAM and an encryption logic block 80 with a finite state machine. The dual port memory architecture is used for efficiency during permutation and message processing.
    Type: Application
    Filed: September 13, 2001
    Publication date: May 15, 2003
    Inventors: Richard J. Swindlehurst, Joel D. Feldman
  • Patent number: 5423139
    Abstract: A two-part garment label is provided. A first detachable part includes inventory information that may be separated along a perforation from the garment care part of the label that is sewn into the garment. The part of the label carrying the inventory information is then attached to the hanger supporting the garment by passing the hook of the hanger through an aperture in the inventory portion of the label. The inventory portion of the label is not separated from the garment care portion of the label until the garment is made ready for shipment or sale. The inventory portion of the label may display machine-readable inventory information and the accuracy of the machine-readable inventory information is ensured because it remains attached to the correct garment until the garment is made ready for shipment or sale.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: June 13, 1995
    Assignee: Byer California
    Inventor: Joel D. Feldman