Patents by Inventor Joel Danzig

Joel Danzig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7130314
    Abstract: A method and computer program product for providing RTP suppression across a DOCSIS network. An index number and a set of rules are sent to a receiver. The index number indicates the type of header suppression technique (i.e., RTP header suppression) to be performed, and the set of rules define how to recreate the RTP packets on the receiving end. At least one complete RTP packet is transmitted upstream for enabling a receiver to learn the RTP header. Subsequent RTP packets are transmitted upstream for reconstruction at the receiving end. The subsequent RTP packets are comprised of delta values representing fields that dynamically change from packet to packet in an RTP header.
    Type: Grant
    Filed: October 11, 2001
    Date of Patent: October 31, 2006
    Assignee: Broadcom Corporation
    Inventors: Fred A. Bunn, Thomas L. Johnson, Joel Danzig
  • Patent number: 7089478
    Abstract: A system, method and computer program product is provided for mitigating the effects of burst noise on packets transmitted in a communications system. A transmitting device applies an outer code, which may include, for example, a block code, an exclusive OR (XOR) code, or a repetition code, to one or more packets prior to adaptation of the packets for transmission over the physical (PHY) layer of the communications system, wherein the PHY layer adaptation may include FEC encoding of individual packets. The outer coded packets are then separately transmitted over a channel of the communications system. A receiving device receives the outer coded packets, performs PHY level demodulation and optional FEC decoding of the packets, and then applies outer code decoding to the out6r coded packets in order to restore packets that were erased during transmission due to burst noise or other impairments on the channel.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: August 8, 2006
    Assignee: Broadcom Corporation
    Inventors: Scott Cummings, Joel Danzig, Stephen Hughey, Thomas L. Johnson
  • Publication number: 20060161370
    Abstract: Systems and methods for pulse stretching architectures for phase alignment of multi-frequency clocks for high speed data acquisitions are disclosed. A high speed data acquisition system includes a transmitter and a receiver. The receiver includes a multi-frequency clock generator that generates a plurality of clock signals, a pattern check module that detects a test pattern received from the transmitter and outputs a stretch command signal, and a stretch pulse generator that receives the stretch command signal and provides a stretch pulse signal that aligns the phases of the plurality of clock signals generated by the multi-frequency clock generator. Methods for initializing and shifting multi-phase clock signals to optimize error performance of a high speed data acquisition system are also provided.
    Type: Application
    Filed: October 24, 2005
    Publication date: July 20, 2006
    Applicant: Broadcom Corporation
    Inventors: Xicheng Jiang, Chun-Ying Chen, Kevin Miller, Joel Danzig, Beth Wilcher
  • Publication number: 20060087461
    Abstract: A system for spur cancellation comprises an input, an output, a memory, and a summer. A value corresponding to an energy level of a spur is stored in the memory. The summer is configured to receive an input signal from the input, to receive the value from the memory, to subtract the value from the input signal, and to convey an output signal to the output. The output signal is a difference of the value subtracted from the input signal.
    Type: Application
    Filed: October 25, 2005
    Publication date: April 27, 2006
    Applicant: Broadcom Corporation
    Inventors: Joel Danzig, Kevin Miller, H. Whitehead
  • Publication number: 20050074081
    Abstract: A data synchronizer is provided for synchronizing data across two different clock domains in a manner that avoids additive jitter. The data synchronizer includes a synchronizer inputting a sampling clock and a data clock, and outputting an edge pulse. A synchronizer jitter lockout circuit inputs the edge pulse and the sampling clock and outputs a data sampling enable signal which never coincides with a data transition.
    Type: Application
    Filed: November 18, 2002
    Publication date: April 7, 2005
    Inventors: Joel Danzig, David Dworkin, Gregory Tow, Robert Hebert
  • Publication number: 20040221075
    Abstract: A novel method and interface is provided for conducting read data transfers between an initiator device on a single-transaction bus and a target device on a split-transaction bus. Embodiments of the present invention permit the initiator device to “post” a read request for a specified amount of data from a specified address on the split-transaction bus to an interface that resides between the single-transaction bus and the split-transaction bus. The requested read data is then retrieved over the split-transaction bus and presented in a high-speed memory within the interface for direct access by the initiator device over the single-transaction bus. Latency is avoided because the initiator device is not required to wait for the emergence of the requested read data from the split-transaction bus but, instead, may continue to perform other activities on the single-transaction bus and then obtain the requested read data at a later time.
    Type: Application
    Filed: June 9, 2004
    Publication date: November 4, 2004
    Applicant: Broadcom Corporation
    Inventors: William Gordon Keith Dobson, Joel Danzig
  • Patent number: 6766386
    Abstract: A novel method and interface is provided for conducting read data transfers between an initiator device on a single-transaction bus and a target device on a split-transaction bus. Embodiments of the present invention permit the initiator device to “post” a read request for a specified amount of data from a specified address on the split-transaction bus to an interface that resides between the single-transaction bus and the split-transaction bus. The requested read data is then retrieved over the split-transaction bus and presented in a high-speed memory within the interface for direct access by the initiator device over the single-transaction bus. Latency is avoided because the initiator device is not required to wait for the emergence of the requested read data from the split-transaction bus but, instead, may continue to perform other activities on the single-transaction bus and then obtain the requested read data at a later time.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: July 20, 2004
    Assignee: Broadcom Corporation
    Inventors: William Gordon Keith Dobson, Joel Danzig
  • Publication number: 20040037217
    Abstract: A network monitor includes means for monitoring downstream traffic from a cable modem termination system (CMTS) to a cable modem (CM), means for monitoring upstream traffic from the CM to the CMTS, and means for identifying a data format used by the CMTS and the CM for bi-directional communication.
    Type: Application
    Filed: May 19, 2003
    Publication date: February 26, 2004
    Inventors: Joel Danzig, Paul Burrell, Shane Tow, Robert J. Herbert, David R. Dworkin, Harold R. Whitehead, Richard Protus, Rennie Gardner, Fred Bunn, David B. Mixson, Vincent Patrick Assini, Taruna Tjahjadi
  • Publication number: 20030169735
    Abstract: A method, apparatus and computer program product is provided for classifying a target data packet entering a network interface. For each of a plurality of received classification parameters, at least one program module is generated. Each program module tests a pre-defined field(s) of the target data packet for adherence to the classification parameter(s) with which the program module is associated. A pre-classification header is generated wherein an indication is made of where one or more pre-defined fields are located in the data packet if the field is present. Maintaining locations of the pre-defined fields of the target data packet in the pre-classification header prevents having to recalculate the addresses of the pre-defined fields of the target data packet. Eliminating the need for re-calculating the addresses of the pre-defined field(s) can allow the classification process of the present invention to obtain an optimal execution speed.
    Type: Application
    Filed: March 5, 2002
    Publication date: September 11, 2003
    Applicant: Broadcom Corporation
    Inventors: Thomas L. Johnson, Joel Danzig, Paul Burrell
  • Publication number: 20030046473
    Abstract: A novel method and interface is provided for conducting read data transfers between an initiator device on a single-transaction bus and a target device on a split-transaction bus. Embodiments of the present invention permit the initiator device to “post” a read request for a specified amount of data from a specified address on the split-transaction bus to an interface that resides between the single-transaction bus and the split-transaction bus. The requested read data is then retrieved over the split-transaction bus and presented in a high-speed memory within the interface for direct access by the initiator device over the single-transaction bus. Latency is avoided because the initiator device is not required to wait for the emergence of the requested read data from the split-transaction bus but, instead, may continue to perform other activities on the single-transaction bus and then obtain the requested read data at a later time.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Inventors: William Gordon Keith Dobson, Joel Danzig
  • Publication number: 20030002499
    Abstract: A system, method and computer program product is provided for mitigating the effects of burst noise on packets transmitted in a communications system, wherein each packet includes two or more FEC blocks. A receiving device implements an FEC block reconstruction technique to restore FEC blocks that have been corrupted by burst noise. In accordance with this technique, the receiving device receives some but not all of the FEC blocks of a transmitted packet. The receiving device then replaces the bad FEC blocks with good FEC blocks from a repeated packet transmission, if repetition outer coding is used, or by requesting retransmission of the bad FEC blocks or the entire original packet from a transmitting device, if a retransmission technique is used. A combination of repetition coding, retransmission, and FEC block reconstruction may also be used.
    Type: Application
    Filed: June 20, 2002
    Publication date: January 2, 2003
    Applicant: Broadcom Corporation
    Inventors: Scott Cummings, Joel Danzig, Stephen Hughey, Thomas L. Johnson
  • Publication number: 20020106029
    Abstract: A method and computer program product for providing RTP suppression across a DOCSIS network. An index number and a set of rules are sent to a receiver. The index number indicates the type of header suppression technique (i.e., RTP header suppression) to be performed, and the set of rules define how to recreate the RTP packets on the receiving end. At least one complete RTP packet is transmitted upstream for enabling a receiver to learn the RTP header. Subsequent RTP packets are transmitted upstream for reconstruction at the receiving end. The subsequent RTP packets are comprised of delta values representing fields that dynamically change from packet to packet in an RTP header.
    Type: Application
    Filed: October 11, 2001
    Publication date: August 8, 2002
    Applicant: Broadcom Corporation
    Inventors: Fred A. Bunn, Thomas L. Johnson, Joel Danzig