Patents by Inventor Joel Duenow

Joel Duenow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9419170
    Abstract: Methods for treating a semiconductor material are provided. According to an aspect of the invention, the method includes annealing the semiconductor material in the presence of a compound that includes a first element and a second element. The first element provides an overpressure to achieve a desired stoichiometry of the semiconductor material, and the second element provides a dopant to the semiconductor material.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: August 16, 2016
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: David Albin, James Burst, Wyatt Metzger, Joel Duenow, Stuart Farrell, Eric Colegrove
  • Publication number: 20150221810
    Abstract: Methods for treating a semiconductor material are provided. According to an aspect of the invention, the method includes annealing the semiconductor material in the presence of a compound that includes a first element and a second element. The first element provides an overpressure to achieve a desired stoichiometry of the semiconductor material, and the second element provides a dopant to the semiconductor material.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 6, 2015
    Inventors: David ALBIN, James BURST, Wyatt METZGER, Joel DUENOW, Stuart FARRELL, Eric COLEGROVE
  • Publication number: 20130327398
    Abstract: Improved thin-film photovoltaic devices and methods of manufacturing such devices are described. Embodiments include a substrate-configured thin-film PV device (200) having a photo-absorbing semiconductor layer (230) and a window layer (240). Embodiments include devices having a CdTe photo-absorbing semiconductor layer, a CdS or CdS:In window layer, and an n-p junction residing at or proximate an interface of the photo-absorbing semiconductor and window layers. Variations include methods of manufacture wherein i) O2 is excluded from an ambient environment during deposition of the CdTe layer (102), ii) O2 is included in an ambient environment during CdCl2 treatment (103), iii) O2 is included in an ambient environment during deposition of a CdS or CdS:In layer (104), or iv) a medium-temperature anneal (MTA) having an anneal temperature of 300° C. or less is performed (105) after deposition of the CdS layer.
    Type: Application
    Filed: February 27, 2012
    Publication date: December 12, 2013
    Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
    Inventors: Ramesh Dhere, Joel Duenow, Timothy A. Gessert