Patents by Inventor Joel F. Bartlett

Joel F. Bartlett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6573883
    Abstract: A method is provided for controlling a handheld computing device through the use of gesture commands. A gesture command corresponds to a pattern of movement of the handheld device that is measured as a function of time F(t), where ts is a start time and tf is a finish time such that the interval of time is tf minus ts. The gesture command further corresponds to angular orientations of the handheld device. The method comprises the steps of: measuring movement of the device over an interval of time with a motion sensor mounted to the device, the measuring producing a signal; analyzing the signal measured over the interval of time to determine a gesture command that corresponds to the movement of the device; and processing the gesture command to control the handheld computing device. To enable use of different gesture commands, the method includes a comparison of the signal to a catalog of gesture commands to determine a particular gesture command.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: June 3, 2003
    Assignee: Hewlett Packard Development Company, L.P.
    Inventor: Joel F. Bartlett
  • Patent number: 6347290
    Abstract: A method is provided for processing an input command for a handheld computing device, comprising the steps of: measuring movement of the device over an interval of time with a motion sensor mounted to the device to generate a signal; analyzing the signal measured over the interval of time to determine a gesture command that corresponds to the movement of the device; and processing the gesture command to control the device as of an orientation of the device at the beginning of the interval. In addition to gesture commands, position commands can be input. Position commands are processed by measuring of a series of orientations of the device, analyzing the signal to determine a series of position commands that correspond to the series of orientations of the device, and processing the series of position commands to control the device. The method of processing of gesture commands avoids confusion due to inappropriate processing of orientations falsely determined to be position commands.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: February 12, 2002
    Assignee: Compaq Information Technologies Group, L.P.
    Inventor: Joel F. Bartlett
  • Patent number: 6151208
    Abstract: A handheld computing device is provided, which includes: a motion sensor fixed to the device sensing an orientation of the device and a mounting structure for mounting the device on a superior dorsal aspect of the hand. The device can include an enclosure shaped to conform to the superior dorsal aspect of the hand. The enclosure can be triangular-shaped with rounded vertices. The device can include a display screen for display of data. The mounting structure can include a glove.
    Type: Grant
    Filed: June 24, 1998
    Date of Patent: November 21, 2000
    Assignee: Digital Equipment Corporation
    Inventor: Joel F. Bartlett
  • Patent number: 5283560
    Abstract: A computer display control system displays semi-transparent control menus superimposed over other images. The computer system has a central processing unit, a program memory that stores an application or operating system program that generates and displays a first set of images on the display, and a menu generating program that displays a control menu having a list of menu items. The displayed control menu is a stippled image that is partially transparent. When the control menu is superimposed over the first set of images, the first set of images remains visible on the display below the control menu. The menu generating program logically ANDs predefined control menu images with a halftone screen so as to generate a stippled control menu image comprising an array of interleaved transparent and non-transparent pixels. In the preferred embodiment, the menu generating program displays a first version of the control menu when the control menu is unselected and a second version when said control menu is selected.
    Type: Grant
    Filed: June 25, 1991
    Date of Patent: February 1, 1994
    Assignee: Digital Equipment Corporation
    Inventor: Joel F. Bartlett
  • Patent number: 4907151
    Abstract: In a computer system, a dynamic memory allocation and recovery system and method, sometimes referred to as a garbage collection system and method, provides a heap of storage space for storing program objects generated by a task. The heap is divided into pages whose size is independent of physical page sizes used by the computer system. Pages are denoted an unallocated or allocated for storing program objects. A root stroage area stores information called hints regarding program objects stored in the heap. The hints can include ambiguous pointers which may or may not point to program objects stored in the heap. Garbage collection is performed by promoting and retaining all pages in the heap which are referenced by hints, and by copying into previously unallocated pages all other accessible program objects in the heap. All pointers to the copied program objects are replaced with pointers to the new copies of those program objects.
    Type: Grant
    Filed: September 30, 1988
    Date of Patent: March 6, 1990
    Assignee: Digital Equipment Corporation
    Inventor: Joel F. Bartlett
  • Patent number: 4817091
    Abstract: In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module.
    Type: Grant
    Filed: May 19, 1987
    Date of Patent: March 28, 1989
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4807116
    Abstract: In a multiprocessor system comprising a plurality of individual processor modules interconnected by a bus structure, including a bus controller, for providing communication between the processor modules, a method and apparatus for interprocessor communication includes one of the processor modules sending a request signal to the bus controller to request a transmission; the bus controller polling the processor modules to identify the requesting processor module; the requestor processor module responding to the poll with the identification of the receiver processor module; the bus controller interrogating the receiver processor module to determine its status (i.e., busy or available); and the bus controller then signaling transmission commencement.
    Type: Grant
    Filed: May 18, 1987
    Date of Patent: February 21, 1989
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4672537
    Abstract: A multiprocessor system of the kind in which two or more separate processor modules are interconnected for parallel processing includes interprocessor buses dedicated exclusively to interprocessor communication. The multiprocessor system includes an input/output system having multi-port device controllers and input/output buses connecting each device controller for access by the input/output channels of at least two different processor modules. Each device controller includes logic which insures that only one port is selected for access at a time. An enable latch in each port dynamically disables that port from placing any signals on the related input/output bus in response to a failure of any portion of the device controller, and the enable latch is not responsive to the processor module for re-enabling the port.
    Type: Grant
    Filed: April 29, 1985
    Date of Patent: June 9, 1987
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4672535
    Abstract: In a multiprocessor system of the type in which two or more separate processor modules are connected by an interprocessor bus dedicated exclusively to interprocessor communication for parallel processing, there is provided an input/output system having multiported device controllers connected to the multiprocessor system by input/output buses. Each device controller is shared by pairs of the processor modules, and includes logic that ensures that only one port is selected for access at a time.
    Type: Grant
    Filed: March 18, 1985
    Date of Patent: June 9, 1987
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4639864
    Abstract: A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing. The multiprocessor system includes an input/output system having multi-port device controllers and input/output buses connecting each device controller for access by the input/output channels of at least two different processor modules.The multiprocessor system includes a distributed power supply system which insures non-stop operation of the remainder of the multiprocessor system in the event of a failure of a power supply for a part of the system. The distributed power supply system includes a separate power supply for each processor module and two separate power supplies for each device controller. A power interlock system and a method are provided for protection against data corruption.
    Type: Grant
    Filed: May 6, 1980
    Date of Patent: January 27, 1987
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4484275
    Abstract: An input/output system for a processor of the kind in which a processor module has a central processing unit, a memory, an input/output channel, and a plurality of device controllers for controlling the transfer of data between the processor module and the peripheral devices includes a star poll connection in which each device controller is provided with a signalling means for signalling its identity in response to a poll operation, independently of other similarly connected device controllers such that any number of device controllers can be failed or powered off without affecting the polling of the other device controllers. The data lines in an input/output bus are used both to transmit data and to transmit signals to reduce the total number of lines needed to connect the device controllers to the channel in the star poll connection. The system is a fault tolerant system which includes an enable bit in the port of each device controller.
    Type: Grant
    Filed: June 17, 1983
    Date of Patent: November 20, 1984
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4378588
    Abstract: A datapath system and protocol is disclosed in which data is transferred between a computer memory and one or more peripheral devices through device controllers, each of which includes a buffer, through periodic connection of the device controller to the channel. The system and protocol are structured to permit multiple device controllers to cooperatively interact on a single channel, without direct communication between device controllers. Each device controller monitors the level of stress on its buffer and at appropriate times presents a reconnect request to the channel, together with indica for permitting the channel to determine the priority of a particular request relative to other reconnect requests. The times at which a reconnect signal should be presented are determined by monitoring the level of information storage in the buffer and relating that level to a threshold level; both overfilling and overemptying are prevented.
    Type: Grant
    Filed: May 6, 1980
    Date of Patent: March 29, 1983
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4365295
    Abstract: A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by either bus.The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code. The memory system includes a map which translates logical addresses to physical addresses and which coacts with the multiprocessor system to bring pages from secondary memory into primary main memory as required to implement a virtual memory system. The map also provides a protection function. It provides inherent protection among users in a multiprogramming environment, isolates programs from data and protects system programs from the actions of user programs.
    Type: Grant
    Filed: May 6, 1980
    Date of Patent: December 21, 1982
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4356550
    Abstract: A multiprocessor system, the kind in which two or more separate processor modules are interconnected for two power supplies, provides the entire power for the device controller in the event the other power supply fails. The distributed power supply system permits any processor module or device controller to be powered down so that on-line maintenance can be performed in a power-off condition while the rest of the multiprocessor system is on-line and functional.The multiprocessor system includes a memory system in which the memory of each processor module is divided into four logical address areas--user data, system data, user code and system code. The memory system includes a map which translates logical addresses to physical addresses and which coacts with the multiprocessor system to bring pages from secondary memory into primary main memory as required to implement a virtual memory system. The map also provides a protection function.
    Type: Grant
    Filed: May 6, 1980
    Date of Patent: October 26, 1982
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga
  • Patent number: 4228496
    Abstract: A multiprocessor system the kind in which two or more separate processor modules are interconnected for parallel processing includes two redundant interprocessor buses dedicated exclusively to interprocessor communication. Any processor module may send information to any other processor module by either bus. The buses are shared in use by the processor modules on a time-sharing basis. Use of each bus is controlled by a special bus controller.The multiprocessor system includes an input/output system having multi-port device controllers and input/output buses connecting each device controller for access by the input/output channels of at least two different processor modules. Each device controller includes logic which insures that only one port is selected for access at a time.The multiprocessor system includes a distributed power supply system which insures nonstop operation of the remainder of the multiprocessor system in the event of a failure of a power supply for a part of the system.
    Type: Grant
    Filed: September 7, 1976
    Date of Patent: October 14, 1980
    Assignee: Tandem Computers Incorporated
    Inventors: James A. Katzman, Joel F. Bartlett, Richard M. Bixler, William H. Davidow, John A. Despotakis, Peter J. Graziano, Michael D. Green, David A. Greig, Steven J. Hayashi, David R. Mackie, Dennis L. McEvoy, James G. Treybig, Steven W. Wierenga