Patents by Inventor Joel Frederick Darnauer

Joel Frederick Darnauer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Source synchronous link with clock recovery and bit skew alignment
    Patent number: 8000351
    Abstract: A high speed transmission system transfers data streams over a plurality of data links. Each data link may carry a number of bit streams. A clock signal is not transmitted over the optical link. Instead, an indication of the appropriate clock signal frequency and phase is embedded in the transmitted data. At the receiving end, a clock signal of an appropriate frequency and phase is generated. The new clock signal is used to sample and reconstruct the original data streams.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: August 16, 2011
    Assignee: Juniper Networks, Inc.
    Inventors: David Chengson, Joel Frederick Darnauer, Matthew A. Tucker
  • SOURCE SYNCHRONOUS LINK WITH CLOCK RECOVERY AND BIT SKEW ALIGNMENT
    Publication number: 20090168810
    Abstract: A high speed transmission system transfers data streams over a plurality of data links. Each data link may carry a number of bit streams. On the transmitting end, multiplexers serialize the bit streams, which are then transmitted to the receiving end. A clock signal is not transmitted over the optical link. Instead, an indication of the appropriate clock signal frequency and phase is embedded in the transmitted data. At the receiving end, a clock recovery circuit generates a clock signal of an appropriate frequency and phase based on the embedded indication. The new clock signal is used to sample and reconstruct the original data streams.
    Type: Application
    Filed: February 27, 2009
    Publication date: July 2, 2009
    Applicant: JUNIPER NETWORKS, INC.
    Inventors: David CHENGSON, Joel Frederick DARNAUER, Matthew A. TUCKER
  • Source synchronous link with clock recovery and bit skew alignment
    Patent number: 7515614
    Abstract: A high speed transmission system transfers data streams over a set of data links. Each data link may carry a number of bit streams. A clock signal is not transmitted over the optical link. Instead, an indication of the appropriate clock signal frequency and please is embedded in the transmitted data. At the receiving end, a clock signal of an appropriate frequency and phase is generated. The new clock signal is used to sample and reconstruct the original data streams.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: April 7, 2009
    Assignee: Juniper Networks, Inc.
    Inventors: David Chengson, Joel Frederick Darnauer, Matthew A. Tucker
  • Source synchronous link with clock recovery and bit skew alignment
    Patent number: 7061939
    Abstract: A high speed transmission system transfers data streams over a plurality of data links. Each data link may carry a number of bit streams. On the transmitting end, multiplexers serialize the bit streams, which are then transmitted to the receiving end. A clock signal is not transmitted over the optical link. Instead, an indication of the appropriate clock signal frequency and phase is embedded in the transmitted data. At the receiving end, a clock recovery circuit generates a clock signal of an appropriate frequency and phase based on the embedded indication. The new clock signal is used to sample and reconstruct the original data streams.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: June 13, 2006
    Assignee: Juniper Networs, Inc.
    Inventors: David Chengson, Joel Frederick Darnauer, Matthew A. Tucker