Abstract: A protection circuit for a power amplifier connected as a negative feedback loop around the power amplifier. The negative feedback loop comprises a detector circuit, a driver circuit and an attenuator circuit. The detector circuit receives output voltage from the power amplifier and generates a signal when the output voltage exceeds a predefined threshold. The driver circuit filters the signal received from the detector circuit to maintain feedback loop stability and adjusts the feedback loop bandwidth and gain to provide a filtered signal. The attenuator circuit receives the filtered signal and attenuates the input voltage of the power amplifier to reduce the output voltage of the power amplifier to a level below the predefined threshold.

Abstract: An amplifier module has a substrate, as assembly having one or more integrated circuit (IC) dies mounted to the substrate, and one or more other electronic components mounted to the substrate. The assembly receives an input signal and generates an amplified output signal. The one or more other electronic components perform one or more amplifier-related functions. The amplifier module is adapted to be mounted to a circuit board (CB) as a distinct electronic package. The invention may be implemented as an electronic system having the CB and at least one such amplifier module mounted to the CB.

Abstract: An electronic module has a non-conducting substrate having at least one opening and a die/carrier assembly mounted within the opening in the substrate. The assembly has a conducting carrier and one or more integrated circuit (IC) dies mounted to the carrier. The invention may be implemented as an electronic system comprising a circuit board (CB) and at least one such electronic module mounted to the CB.

Abstract: An IC device includes an MOS device having a gate terminal, a source terminal and a drain terminal, the gate terminal being operatively coupled to an input of the IC device, the drain terminal being operatively coupled to an output of the IC device, and the source terminal being coupled to a negative voltage supply. The IC device further includes a bias generator operatively coupled to the gate terminal of the MOS device, the bias generator generating a bias voltage and/or a bias current for biasing the MOS device at a substantially constant quiescent operating point. The bias generator is configured such that the bias voltage and/or bias current varies as a function of a junction temperature of the MOS device. In this manner, the bias generator accurately tracks one or more operating conditions of the MOS device, thereby improving the performance of the device.