Patents by Inventor Joel R. Goergen
Joel R. Goergen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9560774Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.Type: GrantFiled: March 14, 2012Date of Patent: January 31, 2017Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Greg Hunt
-
Publication number: 20160366072Abstract: A packet network device such as a network switch includes a number of functional cards or chassis modules at least some of which are connected to both an electrical backplane and a wireless backplane. The electrical backplane provides data plane signal paths and the wireless backplane provides control plane signal paths.Type: ApplicationFiled: August 24, 2016Publication date: December 15, 2016Inventor: Joel R. Goergen
-
Patent number: 9455937Abstract: A packet network device such as a network switch includes a number of functional cards or chassis modules at least some of which are connected to both an electrical backplane and a wireless backplane. The electrical backplane provides data plane signal paths and the wireless backplane provides control plane signal paths.Type: GrantFiled: May 10, 2010Date of Patent: September 27, 2016Assignee: Force10 Networks, Inc.Inventor: Joel R. Goergen
-
Publication number: 20150156863Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.Type: ApplicationFiled: November 26, 2014Publication date: June 4, 2015Inventors: Joel R. Goergen, Yi Zheng
-
Patent number: 9003652Abstract: The characteristic impedance of a surface pad is manipulated by reticulating the pad and filling the spaces with a dielectric material, providing an inductive element in the coupling of the surface pad to an underlying ground pad of a ground plane, or a combination of these approaches. In appropriate embodiments, acceptable signal trace routing paths will exist in an embedded signal layer under the ground plane and crossing under the surface pad. Other embodiments are also described and claimed.Type: GrantFiled: February 20, 2012Date of Patent: April 14, 2015Assignee: Dell Products L.P.Inventors: Joel R. Goergen, Greg Hunt, Peter Tomaszewski, Joseph Pankow, Michael Laudon
-
Patent number: 8898891Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.Type: GrantFiled: December 7, 2010Date of Patent: December 2, 2014Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Yi Zheng
-
Patent number: 8422586Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.Type: GrantFiled: February 20, 2012Date of Patent: April 16, 2013Assignee: Force10 Networks, Inc.Inventors: Yi Zheng, Joel R. Goergen
-
Patent number: 8345439Abstract: A modular packet network device has a chassis in which multiple logic cards mate to the front side of an electrical signaling backplane. Logic power for the logic cards is supplied from a group of power converter cards that convert primary power to the logic voltages required by the logic cards. The power converter cards lie in a separate cooling path behind the backplane. Advantages achieved in at least some of the embodiments include removing primary power planes from the signaling backplane or portion of the backplane, providing redundant, upgradeable power modules whose individual failure does not cause logic card failure, and providing cool air to power converter circuits that would be subject to only heated air if located on the logic cards. Other embodiments are also described and claimed.Type: GrantFiled: November 18, 2008Date of Patent: January 1, 2013Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Donald Lewis
-
Patent number: 8304659Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.Type: GrantFiled: October 26, 2007Date of Patent: November 6, 2012Assignee: Force 10 Networks, Inc.Inventor: Joel R. Goergen
-
Patent number: 8259847Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.Type: GrantFiled: October 13, 2011Date of Patent: September 4, 2012Assignee: Force10 Networks, Inc.Inventors: Yi Zheng, Joel R. Goergen
-
Patent number: 8233477Abstract: Methods of operating a packet network device having multiple serial channels crossing a backplane are disclosed. In at least one embodiment, a management function performs dynamic modifications to the packet network device configuration in response to detected backplane errors. These modifications can directly alter a characteristic of a channel that is generating errors, or can indirectly affect such a channel by directly altering a characteristic of an “aggressor” channel that is indicated as producing crosstalk on that channel. Other embodiments are also described and claimed.Type: GrantFiled: March 24, 2008Date of Patent: July 31, 2012Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, John D'Ambrosia
-
Patent number: 8218537Abstract: A serial channel switch circuit and modular packet switch using the serial channel switch circuits are disclosed. The serial channel switch circuit has a reconfigurable table for internal logical-to-physical channel switch translation. Depending on the slot in which a card containing such a serial channel switch circuit is inserted in the modular packet switch, its serial channel switch circuit may receive a different set of reconfigurable table values that are specific to that location. A global set of logical channel values can be applied to each card, which performs logical-to-physical channel mapping according to its location in the modular packet switch. Other embodiments are also described and claimed.Type: GrantFiled: May 30, 2008Date of Patent: July 10, 2012Assignee: Force10 Networks, Inc.Inventors: Ann Gui, Krishnamurthy Subramanian, Glenn Poole, Joel R. Goergen, Joanna Lin
-
Publication number: 20120167386Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.Type: ApplicationFiled: March 14, 2012Publication date: July 5, 2012Applicant: DELL PRODUCTS L.P.Inventors: Joel R. Goergen, Greg Hunt
-
Patent number: 8208253Abstract: A modular packet network device has a chassis in which multiple logic cards mate to the front side of an electrical signaling backplane. Logic power for the logic cards is supplied from a group of power converter cards that convert primary power to the logic voltages required by the logic cards. The power converter cards lie in a separate cooling path behind the backplane. Advantages achieved in at least some of the embodiments include removing primary power planes from the signaling backplane or portion of the backplane, providing redundant, upgradeable power modules whose individual failure does not cause logic card failure, and providing cool air to power converter circuits that would be subject to only heated air if located on the logic cards. Other embodiments are also described and claimed.Type: GrantFiled: November 18, 2008Date of Patent: June 26, 2012Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Donald Lewis
-
Publication number: 20120147990Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.Type: ApplicationFiled: February 20, 2012Publication date: June 14, 2012Applicant: DELL PRODUCTS L.P.Inventors: Yi Zheng, Joel R. Goergen
-
Publication number: 20120144665Abstract: The characteristic impedance of a surface pad is manipulated by reticulating the pad and filling the spaces with a dielectric material, providing an inductive element in the coupling of the surface pad to an underlying ground pad of a ground plane, or a combination of these approaches. In appropriate embodiments, acceptable signal trace routing paths will exist in an embedded signal layer under the ground plane and crossing under the surface pad. Other embodiments are also described and claimed.Type: ApplicationFiled: February 20, 2012Publication date: June 14, 2012Applicant: Dell Products L.P.Inventors: Joel R. Goergen, Greg Hunt, Peter Tomaszewski, Joseph Pankow, Michael Laudon
-
Patent number: 8184450Abstract: A modular packet network device uses bus bars to transfer primary power to either a backplane or directly to one or more cards that perform primary-to-logic-power conversion. The bus bars are fabricated in packages that reduce the transfer of differential and common-mode noise existing in the device chassis into the power delivery system through the bus bars. Other embodiments are also described and claimed.Type: GrantFiled: November 18, 2008Date of Patent: May 22, 2012Assignee: Force10 Networks, Inc.Inventor: Joel R. Goergen
-
Patent number: 8168891Abstract: Circuit boards and methods for their manufacture are disclosed. The circuit boards carry high-speed signals using conductors formed to include lengthwise channels. The channels increase the surface area of the conductors, and therefore enhance the ability of the conductors to carry high-speed signals. In at least some embodiments, a discontinuity also exists between the dielectric constant within the channels and just outside the channels, which is believed to reduce signal loss into the dielectric material.Type: GrantFiled: May 2, 2008Date of Patent: May 1, 2012Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Yi Zheng
-
Patent number: 8119921Abstract: The characteristic impedance of a surface pad is manipulated by reticulating the pad and filling the spaces with a dielectric material, providing an inductive element in the coupling of the surface pad to an underlying ground pad of a ground plane, or a combination of these approaches. In appropriate embodiments, acceptable signal trace routing paths will exist in an embedded signal layer under the ground plane and crossing under the surface pad. Other embodiments are also described and claimed.Type: GrantFiled: December 13, 2007Date of Patent: February 21, 2012Assignee: Force10 Networks, Inc.Inventors: Joel R. Goergen, Greg Hunt, Peter Tomaszewski, Joseph Pankow, Michael Laudon
-
Patent number: 8121205Abstract: Methods and apparatus for serial channel operation are disclosed. An N+1-level signaling scheme is used to transmit N staggered but overlapping NRZ sub-sequences concurrently on a serial channel. Each sequence has a bit rate R and an essential bandwidth of R Hz. The combined bit rate of the channel is N×R, but due to a lack of correlation between the sub-sequences, the essential bandwidth remains approximately R Hz. The signaling scheme also contains redundancy that allows some errors to be detected and/or corrected. Other embodiments are also described and claimed.Type: GrantFiled: March 20, 2008Date of Patent: February 21, 2012Assignee: Force10 Networks, Inc.Inventors: Yi Zheng, Joel R. Goergen