Patents by Inventor Joel Samuel Utz

Joel Samuel Utz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040154171
    Abstract: An automatic optical center punch adapted to perform with high accuracy and ease of use is disclosed. The punch includes a spring-loaded hammer and a rotational latch mechanism. The rotational latch mechanism restrains the movement of the hammer to allow the spring to be compressed when pressure is initially applied to the punch by its operator. When the spring is fully compressed, the latch mechanism engages a cam surface, which causes the latch to rotate to release the hammer. The spring-loaded hammer makes contact with a punch head assembly, which causes perforation of the work surface to take place. Once the hammer has been extended by the spring, the latch engages a second cam surface, which causes the latch to rotate in the opposite direction to restrain the hammer in preparation for the next compression of the spring.
    Type: Application
    Filed: August 1, 2003
    Publication date: August 12, 2004
    Inventors: Katherine Utz, Joel Samuel Utz
  • Patent number: 5841196
    Abstract: A method of forming a via in a interlevel dielectric of a semiconductor device wherein the via has a fluted sidewall. A semiconductor substrate is provided having a first conductive layer formed thereon. A dielectric layer is then formed on the first conductive layer. A photoresist layer is deposited on a dielectric layer and a contact opening is formed in the photoresist layer to expose a contact region of the dielectric layer. A first etch step is performed to remove portions of the dielectric layer proximal to the contact region to form a first stage of the fluted via. The first stage includes a first sidewall stage extending from an upper surface of the dielectric layer at an angle less than 50.degree.. The first stage of the fluted via exterds a first lateral distance which is greater than a lateral dimension of the contact opening. A second etch step is then performed to further remove portions of the dielectric layer to form a second stage of the fluted via.
    Type: Grant
    Filed: November 14, 1997
    Date of Patent: November 24, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Subhash Gupta, Robert Flores, Michael Ross Stamm, Eric Thomas Sharp, Erich W. E. Denninger, Pamela G. Dye, Joel Samuel Utz, James K. Kai
  • Patent number: 5746884
    Abstract: A method of forming a via in a interlevel dielectric of a semiconductor device wherein the via has a fluted sidewall. A semiconductor substrate is provided having a first conductive layer formed thereon. A dielectric layer is then formed on the first conductive layer. A photoresist layer is deposited on a dielectric layer and a contact opening is formed in the photoresist layer to expose a contact region of the dielectric layer. A first etch step is performed to remove portions of the dielectric layer proximal to the contact region to form a first stage of the fluted via. The first stage includes a first sidewall stage extending from an upper surface of the dielectric layer at an angle less than 50.degree.. The first stage of the fluted via extends a first lateral distance which is greater than a lateral dimension of the contact opening. A second etch step is then performed to further remove portions of the dielectric layer to form a second stage of the fluted via.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: May 5, 1998
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Subhash Gupta, Robert Flores, Michael Ross Stamm, Eric Thomas Sharp, Erich W. E. Denninger, Pamela G. Dye, Joel Samuel Utz, James K. Kai