Patents by Inventor Joel T. Medina

Joel T. Medina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7550856
    Abstract: A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A metallic bump (304) made of reflowable metal is attached to each of these contact pads. An electrically insulating substrate (305) has a surface with a plurality of metallic terminal pads (306) in locations matching the locations of the device contact pads, and further a plurality of grooves (310) and humps (311) distributed between the terminal pad locations, complementing the distribution of the terminal pads. Each bump is further attached to its matching terminal pad, respectively; the device is thus interconnected with the substrate and spaced apart by a gap (320). Adherent polymeric material (330) containing inorganic fillers fills the gap substantially without voids.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: June 23, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Jeremias P. Libres, Joel T. Medina, Mary C. Miller
  • Patent number: 7033864
    Abstract: A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A metallic bump (304) made of reflowable metal is attached to each of these contact pads. An electrically insulating substrate (305) has a surface with a plurality of metallic terminal pads (306) in locations matching the locations of the device contact pads, and further a plurality of grooves (310) and humps (311) distributed between the terminal pad locations, complementing the distribution of the terminal pads. Each bump is further attached to its matching terminal pad, respectively; the device is thus interconnected with the substrate and spaced apart by a gap (320). Adherent polymeric material (330) containing inorganic fillers fills the gap substantially without voids.
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: April 25, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Jeremias P. Libres, Joel T. Medina, Mary C. Miller
  • Patent number: 6969638
    Abstract: Disclosed herein is a process for assembling an integrated circuit, as well as the assembly resulting from the process, employing a surface treatment of bondpad surfaces. In one aspect, a method of assembling an integrated circuit includes providing a substrate having electrical terminals on a first side of the substrate and a bondpad on a second side of the substrate opposing the first side. In this embodiment, the bondpad is electrically coupled to at least one of the terminals on the first side. In addition, the method includes mounting an integrated circuit chip to the first side of the substrate, where the integrated circuit component has a lead adapted to be wire-bonded to the terminal. The method further includes removing oxidation from the bondpad, where the bondpad is adapted to be metallurgically bonded to a trace on a printed circuit board. Moreover, this embodiment of the method includes metallurgically bonding the bondpad to the trace.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Erwin R. Estepa, Joel T. Medina, Maria Alesssandra Azurin, Kazuaki Ano