Patents by Inventor Joep De RIJK

Joep De RIJK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PLL glitchless phase adjustment system
    Patent number: 9124415
    Abstract: A clock generator with glitchless phase adjustment having a phase locked loop with a controlled oscillator providing an output representing a phase value. One or more output modules generate one or more output clocks from the output. One or more adjustment modules add a requested phase adjustment to an output clock. The phase adjustment modules are configured to break the requested phase adjustment into smaller increments and apply the increments to an output clock generated in said at the output modules one cycle at a time.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: September 1, 2015
    Assignee: Microsemi Semiconductor ULC
    Inventors: David Colby, Joep De Rijk, Paul H. L. M. Schram, Tanmay Zargar
  • PLL GLITCHLESS PHASE ADJUSTMENT SYSTEM
    Publication number: 20150207620
    Abstract: A clock generator with glitchless phase adjustment having a phase locked loop with a controlled oscillator providing an output representing a phase value. One or more output modules generate one or more output clocks from the output. One or more adjustment modules add a requested phase adjustment to an output clock. The phase adjustment modules are configured to break the requested phase adjustment into smaller increments and apply the increments to an output clock generated in said at the output modules one cycle at a time.
    Type: Application
    Filed: January 14, 2015
    Publication date: July 23, 2015
    Inventors: David COLBY, Joep De RIJK, Paul H.L.M. SCHRAM, Tanmay ZARGAR