Patents by Inventor Joerg Hartzsch

Joerg Hartzsch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7590140
    Abstract: In the method for addressing the participants of a bus system, the central control unit connects the bus line to one potential of the operating voltage, while each participant tries to pull the bus line to a reference potential, normally the operating voltage, wherein, due to the current source behavior of the switch placing the bus to the operating voltage, a current is detectable by a detector arranged in the bus line and associated with the participant. When the participant detects this decrease of current, said participant switches off its switch. Due to time-defined slow connection of the switched current sources, this process takes place sequentially within a group of participants until the last participant is reached. The detector associated with this participant does in no case detect a current, such that, after elapse of a predeterminable on-period, the switch of this participant is still open.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: September 15, 2009
    Assignee: ELMOS Semiconductor AG
    Inventor: Joerg Hartzsch
  • Publication number: 20050271077
    Abstract: In the method for addressing the participants (1 to 4) of a bus system, the central control unit (12) connects the bus line (12) to one potential of the operating voltage, while each participant tries to pull the bus line (12) to a reference potential, normally the operating voltage, wherein, due to the current source behaviour of the switch (26) placing the bus to the operating voltage, a current is detectable by a detector (22) arranged in the bus line and associated with the participant (1 to 4). When the participant detects this decrease of current, said participant switches off its switch (26). Due to time-defined slow connection of the switched current sources, this process takes place sequentially within a group of participants until the last participant is reached. The detector associated with this participant does in no case detect a current, such that, after elapse of a predeterminable on-period, the switch (26) of this participant (1 to 4) is still open.
    Type: Application
    Filed: June 8, 2004
    Publication date: December 8, 2005
    Inventor: Joerg Hartzsch
  • Patent number: 6909275
    Abstract: The electrical circuit for driving a load comprises a transistor (12;14;22) having a load current flowing therethrough, a measurement device (30,32) for determining the voltage drop across this transistor (12;14;22), a device (42) for impressing a measuring current into the transistor (12;14;22), and a device for determining the resistance value of the transistor (12;14;22) in its ON state, this resistance value being between a known maximum value (RXMAX) and a known minimum value (RXMIN). The device for determining the resistance value is provided with a measuring bridge (36) having the transistor (12;14;22) and a known reference resistor (RR) arranged in its first bridge arm (38) and having three respectively known resistors (R1,R2,R3) arranged in its second bridge arm (40).
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: June 21, 2005
    Assignee: ELMOS Semiconductor AG
    Inventor: Joerg Hartzsch
  • Publication number: 20040227530
    Abstract: The electrical circuit for driving a load comprises a transistor (12;14;22) having a load current flowing therethrough, a measurement device (30,32) for determining the voltage drop across this transistor (12;14;22), a device (42) for impressing a measuring current into the transistor (12;14;22), and a device for determining the resistance value of the transistor (12;14;22) in its ON state, this resistance value being between a known maximum value (RXMAX) and a known minimum value (RXMIN). The device for determining the resistance value is provided with a measuring bridge (36) having the transistor (12;14;22) and a known reference resistor (RR) arranged in its first bridge arm (38) and having three respectively known resistors (R1,R2,R3) arranged in its second bridge arm (40).
    Type: Application
    Filed: February 20, 2004
    Publication date: November 18, 2004
    Applicant: ELMOS Semiconductor AG
    Inventor: Joerg Hartzsch