Patents by Inventor Joerg Lindner
Joerg Lindner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240374778Abstract: An absorbent article such as a diaper comprising as component a carded calendered nonwoven comprising synthetic staple fibers, wherein the synthetic staple fibers comprise a polypropylene polymer matrix, an ethylene-propylene copolymer and a fatty acid amide, and optionally natural fibers. The nonwovens may be used in application where a soft and affordable nonwoven is desired, for example in the topsheet or backsheet outer cover nonwoven.Type: ApplicationFiled: May 8, 2024Publication date: November 14, 2024Inventors: GUELTEKIN ERDEM, TORSTEN LINDNER, DIRK SAEVECKE, PRASHANT DESAI, JÖRG THOMAS DAHRINGER, SØREN TANG KLINT, PATRICK GUTMANN, MADS RUDBECK BERGMANN
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Publication number: 20240376649Abstract: A carded calendered nonwoven comprising synthetic staple fibers. The synthetic staple fibers comprise a polypropylene polymer matrix, an ethylene-propylene copolymer and a fatty acid amide. The nonwovens of the present disclosure may be used in application where a soft and affordable nonwoven is desired, for example disposable absorbent articles, such as pants or diapers.Type: ApplicationFiled: May 8, 2024Publication date: November 14, 2024Inventors: TORSTEN LINDNER, GUELTEKIN ERDEM, DIRK SAEVECKE, PRASHANT DESAI, JÖRG THOMAS DAHRINGER, SØREN TANG KLINT, PATRICK GUTMANN, MADS RUDBECK BERGMANN
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Patent number: 12116492Abstract: The invention relates to a non-pigmented composition comprising a) a block co-polymer comprising at least one first block and at least one second block which is different from the first block, wherein the first block comprises repeating units 1, repeating unit 1 and the second block comprises repeating units 2, repeating unit 2 wherein Z represents O or NH, R1 represents H or CH3, R2 represents a group selected from hydrocarbyl groups and ether group-containing groups, R3 represents an organic group having 2 to 4 carbon atoms, R4 and R5 independently represent an organic group, wherein R4 and R5 are optionally linked to each other to form a cyclic structure, and b) a polymer comprising at least one acidic group, and having a number average molecular weight of 300 g/mol or higher.Type: GrantFiled: April 22, 2020Date of Patent: October 15, 2024Assignee: BYK-Chemie GmbHInventors: Andreas Okkel, Hiroshi Yonehara, Benjamin Lindner, Jörg Bömer, Albert Frank, Udo Krappe, Ryo Takabayashi, Yoshizumi Kohara
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Publication number: 20160130160Abstract: The present invention relates to a process for reducing the total organic carbon (TOC) in an aqueous mixture M1 obtained as wastewater from a process for the preparation of an olefin oxide, the process for reducing the TOC comprising: (a) contacting the mixture M1 which contains at least one oxygenate having from 1 to 16 carbon atoms with an adsorbing agent and adsorbing at least a portion of an oxygenate at the adsorbing agent; (b) separating an aqueous mixture M2 from the adsorbing agent, the mixture M2 being depleted of the oxygenate adsorbed in (a); and (c) separating an oxygenate from the mixture M2 obtained in (b) by subjecting the mixture M2 to reverse osmosis in at least one reverse osmosis unit containing a reverse osmosis membrane obtaining an aqueous mixture M3 being depleted of this oxygenate.Type: ApplicationFiled: June 4, 2014Publication date: May 12, 2016Applicants: BASF SE, Dow Global Technologies LLCInventors: Holger BAER, Harlan R. GOLTZ, Joerg LINDNER, Astrid LENZ
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Patent number: 8829532Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.Type: GrantFiled: February 2, 2007Date of Patent: September 9, 2014Assignee: Siltronic AGInventors: Brian Murphy, Maik Häberlen, Jörg Lindner, Bernd Stritzker
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Patent number: 8383495Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.Type: GrantFiled: March 2, 2011Date of Patent: February 26, 2013Assignee: Siltronic AGInventors: Brian Murphy, Maik Haeberlen, Joerg Lindner, Bernd Stritzker
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Publication number: 20110151650Abstract: Semiconductor layer structure and a method for producing a structure are provided, including a substrate made of semiconductor material, on which a layer made of a second semiconductor material is situated, furthermore a region (3) enriched with impurity atoms, which region is situated either in layer (2) or at a specific depth below the interface between layer (2) and substrate (1), additionally a layer (4) within the region (3) enriched with impurity atoms, which layer comprises cavities produced by ion implantation, furthermore at least one epitaxial layer (6) applied to layer (2) and also a defect region (5) comprising dislocations and stacking faults within the layer (4) comprising cavities, the at least one epitaxial layer (6) being largely crack-free, and a residual strain of the at least one epitaxial layer (6) being less than or equal to 1 GPa.Type: ApplicationFiled: March 2, 2011Publication date: June 23, 2011Applicant: SILTRONIC AGInventors: Brian Murphy, Maik Häberlen, Jörg Lindner, Bernd Stritzker
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Patent number: 7294564Abstract: The following invention provides a method for forming a layered semiconductor structure having a layer of a first semiconductor material on a substrate of at least one second semiconductor material, comprising the steps of: providing said substrate; burying said layer of said first semiconductor material in said substrate, said buried layer having an upper surface and a lower surface and dividing said substrate into an upper part and a lower part; creating a buried damage layer; which at least partly adjoins and/or partly includes said upper surface of said buried layer; and removing said upper part of said substrate and said buried damage layer for exposing said buried layer. The invention also provides a corresponding layered semiconductor structure.Type: GrantFiled: October 11, 2002Date of Patent: November 13, 2007Assignee: Siltronic AGInventors: Wilfried Attenberger, Jörg Lindner, Bernd Stritzker
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Publication number: 20060267024Abstract: The invention relates to a semiconductor layer structure of a monocrystalline silicon carbide layer on a ?150 mm diameter silicon wafer, the silicon carbide layer having a surface roughness of at most 0.5 nm RMS and a micropipe density of at most 1 cm?2 and being free of defects produced during crystal growth or epitaxial deposition, and to a process for producing such a semiconductor layer structure, by implanting carbon ions into a silicon wafer, heat treating the silicon wafer to produce a buried monocrystalline silicon carbide layer and flanking noncrystalline transition regions, followed by removing the upper silicon layer and noncrystalline transition region above the monocrystalline silicon carbide layer, thus uncovering the monocrystalline silicon carbide layer, and chemical mechanical planarizing the monocrystalline silicon carbide layer to a surface roughness of less than 0.5 nm RMS.Type: ApplicationFiled: May 22, 2006Publication date: November 30, 2006Applicant: Siltronic AGInventors: Brian Murphy, Maik Haeberlen, Joerg Lindner
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Patent number: 6323350Abstract: The present invention relates to a liquid phase process for preparing an olefin oxide from an olefin in a cascade of two or more reactors, in a baffled tank reactor or in a plug flow reactor which process comprises the steps of a) contacting the olefin in a solvent with oxygen or an oxygen-containing gas in a first reactor of the reactor cascade or in a first stage of the baffled tank reactor or of the plug flow reactor, thereby producing a mixture comprising olefin oxide, non-converted olefin, solvent and by-products and b) transferring at least a portion of the mixture obtained in step a) to a second reactor of the reactor cascade or to a second stage of the baffled tank reactor or plug flow reactor, adding an additional amount of i) oxygen or an oxygen-containing gas and/or ii) olefin to the mixture and continuing the reaction.Type: GrantFiled: June 21, 2000Date of Patent: November 27, 2001Assignee: The Dow Chemical CompanyInventors: Joerg Lindner, Wolfgang Taeuber, Hans-Juergen Wertgen