Patents by Inventor Joerg Plechinger
Joerg Plechinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12260748Abstract: Movement of vehicles through an intersection relative to one another is actively coordinated. The coordination includes sharing data among the vehicles using Vehicle-to-Everything messaging technology. The shared data is used to sequence the movement of the vehicles through the intersection.Type: GrantFiled: January 3, 2020Date of Patent: March 25, 2025Assignees: VOLKSWAGEN AKTIENGESELLSCHAFT, AUDI AGInventors: Thorsten Hehn, Joerg Plechinger, Daniel Pfaller, Markus Mueller, John Walpuck, Jovan Zagajac, Hendrik-Joern Guenther, Kevin Lieberman
-
Patent number: 8064557Abstract: A programmable synchronizing unit for a signal receiver has a received data memory for buffering received data, a correlation value data memory for storing correlation values, a data path for correlating the received data with the correlation values, a result data memory for buffering the received data correlated with the correlation values by means of the data path, and a control unit for addressing the received data memory, the result data memory and the correlation value data memory (26) and for controlling the data path as a function of a synchronization program which is stored in a program memory.Type: GrantFiled: November 17, 2000Date of Patent: November 22, 2011Assignee: Infineon Technologies AGInventors: Burkhard Becker, Markus Doetsch, Peter Jung, Tideya Kella, Joerg Plechinger, Peter Schmidt, Sven Simon, Michael Schneider
-
Patent number: 7139341Abstract: A receiver circuit for a communications terminal includes a signal pre-processing circuit having: an analog/digital converter device with K analog/digital converters connected in parallel, a conversion device, and a filter device connected downstream of the conversion device. The filter device has N digital filters connected in parallel, where N is an integer that is greater than or equal to 1 and is less than K.Type: GrantFiled: November 13, 2001Date of Patent: November 21, 2006Assignee: Infineon Technologies AGInventors: Markus Doetsch, Joerg Plechinger, Peter Jung, Peter Schmidt
-
Patent number: 7003029Abstract: A method for equalizing and decoding an error-protected data signal transmitted via a radio channel is described. According to the method, an equalized data signal is calculated at the receiving end in a demodulator with a first channel estimator. The equalized data signal is decoded by a decoder to determine a decoded output signal. The equalized data signal is transmitted to a second channel estimator, which repeatedly detects second channel parameters of the radio channel. The parameters are transmitted to the decoder which uses them as calculation parameters during decoding.Type: GrantFiled: August 20, 2001Date of Patent: February 21, 2006Assignee: Infineon Technologies, AGInventors: Markus Doetsch, Peter Jung, Joerg Plechinger, Peter Schmidt, Michael Schneider
-
Patent number: 6888877Abstract: CDMA Receiver. According to one embodiment, a CDMA receiver is provided for receiving a CDMA signal in a multi-subscriber environment. The multi-subscriber environment can include a receiving device for receiving the CDMA signal. Further, the environment can include a Rake receiving circuit for detection of signal components of the CDMA signal which are transmitted via the various signal paths. The environment can also include a channel estimation circuit for estimating channel coefficients of a transmission channel coefficient h of a transmission channel H by means of a predetermined reference data sequence contained in the received CDMA signal. A weighting coefficient calculation device can calculate weighting coefficients for the various signal components of the CDMA signal. Further, the environment can include a weighting circuit for weighting the signal components with the calculaed weighting coefficients. A combiner can combine the weighted signal components to form an estimated received data signal.Type: GrantFiled: January 17, 2001Date of Patent: May 3, 2005Assignee: Infineon Technologies AGInventors: Markus Doetsch, Tideya Kella, Peter Schmidt, Peter Jung, Joerg Plechinger, Michael Schneider
-
Patent number: 6829742Abstract: An initial data stream is coded using a first set of n coders to form n coded data streams, which are subsequently punctured by combining the n coded data streams with a first puncturing data field to form a first punctured data stream. The initial data stream is also interleaved using k interleaving circuits to produce k interleaved data streams, which are subsequently coded using a set of m coders to form m coded interleaved data streams. In addition, a second puncturing data field is interleaved to form an interleaved puncturing data field. The m coded interleaved data streams are subsequently punctured by combining the m coded interleaved data streams with the interleaved puncturing data field to form a second punctured data stream. The initial data stream, the first punctured data stream and the second punctured data stream are multiplexed to form a transmission data stream.Type: GrantFiled: February 19, 2002Date of Patent: December 7, 2004Assignee: Infineon Technologies AGInventors: Peter Jung, Joerg Plechinger
-
Publication number: 20040213332Abstract: The invention relates to a CDMA receiver for receiving, in a multiple subscriber environment, a CDMA signal transmitted with a chip rate by a transmitter via different signal paths of a physical transmission channel.Type: ApplicationFiled: January 17, 2002Publication date: October 28, 2004Inventors: Markus Doetsch, Tideya Kella, Peter Schmidt, Peter Jung, Joerg Plechinger, Michael Schneider
-
Patent number: 6646579Abstract: A code word generator for OVSF codes, comprising an intermediate memory device (16) which is used to input a calculation index as a binary calculation index data word, a calculation device (17) which permutes the significant data bits of the calculation index data word bit-by-bit so that a calculation basis (B) can be generated, a counter (21) for producing a counting variable (Z) and provided with a logic circuit comprising several AND gates for bit-by-bit linkage of the counting variables (Z) generated with the calculation basis (B) in order to form a linking data word and several XOR gates for logical reduction of the linking data word to form code word data bits of the OVSF code word.Type: GrantFiled: September 23, 2002Date of Patent: November 11, 2003Assignee: Infineon Technologies AGInventors: Markus Doetsch, Patrick Feyfant, Peter Jung, Tideya Kella, Joerg Plechinger, Peter Schmidt, Michael Schneider
-
Patent number: 6643333Abstract: In a method according to the invention, N data symbols of a subscriber signal form a block. In a first method step, the block is divided into a plurality of partial blocks having Ns data symbols. The Ns data symbols are then allocated to sub-carriers and are modulated in parallel onto the various sub-carriers, the modulation being carried out for each of the sub-carriers with at least one individual code symbol. The sub-carriers are heterodyned to form a broadband carrier, so that the Ns data symbols are transmitted simultaneously. The transmission then takes place in N/Ns successive partial blocks via the radio interface.Type: GrantFiled: September 28, 1999Date of Patent: November 4, 2003Assignee: Siemens AktiengesellschaftInventors: Peter Jung, Friedbert Berens, Joerg Plechinger, Paul Walter Baier
-
Publication number: 20030105532Abstract: A code word generator for OVSF codes, comprising an intermediate memory device (16) which is used to input a calculation index as a binary calculation index data word, a calculation device (17) which permutes the significant data bits of the calculation index data word bit-by-bit so that a calculation basis (B) can be generated, a counter (21) for producing a counting variable (Z) and provided with a logic circuit comprising several AND gates for bit-by-bit linkage of the counting variables (Z) generated with the calculation basis (B) in order to form a linking data word and several XOR gates for logical reduction of the linking data word to form code word data bits of the OVSF code word.Type: ApplicationFiled: September 23, 2002Publication date: June 5, 2003Inventors: Markus Doetsch, Patrick Fevfant, Peter Jung, Tideya Kella, Joerg Plechinger, Peter Schmidt, Michael Schneider
-
Patent number: 6574291Abstract: A turbo-code decoder with iterative channel parameter estimation for decoding turbo-coded received data that includes systematic information data and redundant data. The turbo-code decoder includes a weighting circuit for weighting the turbo-coded received data with at least one estimated channel parameter. Estimated value data is generated. A turbo-code coding circuit turbo-codes the generated estimated value data. A comparison circuit compares the turbo-coded estimated value data with the turbo-coded received data, and depending on the result of the comparison, iteratively sets the estimated channel parameter(s) in order to weight the turbo-coded received data.Type: GrantFiled: February 28, 2002Date of Patent: June 3, 2003Assignee: Infineon Technologies AGInventors: Markus Doetsch, Tideya Kella, Peter Schmidt, Peter Jung, Joerg Plechinger, Michael Schneider
-
Publication number: 20030007579Abstract: A turbo-code decoder with iterative channel parameter estimation for decoding turbo-coded received data that includes systematic information data and redundant data. The turbo-code decoder includes a weighting circuit for weighting the turbo-coded received data with at least one estimated channel parameter. Estimated value data is generated. A turbo-code coding circuit turbo-codes the generated estimated value data. A comparison circuit compares the turbo-coded estimated value data with the turbo-coded received data, and depending on the result of the comparison, iteratively sets the estimated channel parameter(s) in order to weight the turbo-coded received data.Type: ApplicationFiled: February 28, 2002Publication date: January 9, 2003Inventors: Markus Doetsch, Tideya Kella, Peter Schmidt, Peter Jung, Joerg Plechinger, Michael Schneider
-
Publication number: 20020085124Abstract: A receiver circuit for a communications terminal includes a signal pre-processing circuit having: an analog/digital converter device with K analog/digital converters connected in parallel, a conversion device, and a filter device connected downstream of the conversion device. The filter device has N digital filters connected in parallel, where N is an integer that is greater than or equal to 1 and is less than K.Type: ApplicationFiled: November 13, 2001Publication date: July 4, 2002Inventors: Markus Doetsch, Joerg Plechinger, Peter Jung, Peter Schmidt
-
Publication number: 20020034223Abstract: A method for equalizing and decoding an error-protected data signal transmitted via a radio channel is described. According to the method, an equalized data signal is calculated at the receiving end in a demodulator with a first channel estimator. The equalized data signal is decoded by a decoder to determine a decoded output signal. The equalized data signal is transmitted to a second channel estimator, which repeatedly detects second channel parameters of the radio channel. The parameters are transmitted to the decoder which uses them as calculation parameters during decoding.Type: ApplicationFiled: August 20, 2001Publication date: March 21, 2002Inventors: Markus Doetsch, Peter Jung, Joerg Plechinger, Peter Schmidt, Michael Schneider
-
Patent number: 6272183Abstract: In a method for data transmission on transmission channels in a digital transmission system, turbo coding is carried out in a turbo coder at a transmitter end for channel coding, and turbo decoding with soft-decision output signals is carried out in a turbo decoder at the receiver end. In order to improve the quality of service, the quality of service is determined from the variances of the soft-output signals at the turbo decoder, and the coding rate is set by adaptation of the puncturing such that a predetermined quality of service is obtained. Alternatively, the number of decoding iterations is set as a function of the quality of service. If a MAP symbol assessor is used at the receiver end, the variances &sgr;2LLR of the soft-decision output signals from the turbo decoder are determined, and the bit error rate is calculated from the variances &sgr;2LLR as a measure of the quality of service.Type: GrantFiled: February 22, 2000Date of Patent: August 7, 2001Assignee: Siemens AktiengesellschaftInventors: Friedbert Berens, Markus Doetsch, Joerg Plechinger, Peter Jung
-
Patent number: RE41583Abstract: A transceiver configuration has an integrated circuit (IC) with an A/D and/or D/A converter, a VCO with a reference oscillator, which provides a sampling clock for the A/D and/or D/A converter, and a digital data processing circuit. The IC is connected to a radio-frequency section, the frequency converter stage of which is operated with a beat frequency derived from the controllable oscillator frequency foz. A capacitive resonant element of the reference oscillator is disposed outside of the IC.Type: GrantFiled: January 24, 2007Date of Patent: August 24, 2010Assignee: Infineon Technologies AGInventors: Markus Doetsch, Peter Jung, Joerg Plechinger, Peter Schmidt